| /third_party/mesa3d/src/compiler/glsl/glcpp/tests/ |
| H A D | 098-elif-undefined.c | 4 Nor this
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| /third_party/typescript/tests/baselines/reference/ |
| H A D | extendsUntypedModule.js | 9 Nor is this one.
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| /third_party/skia/third_party/externals/angle2/src/common/ |
| H A D | PackedGLEnums_autogen.cpp | 962 return LogicalOperation::Nor; in FromGLenum()
1002 case LogicalOperation::Nor: in ToGLenum()
1054 case LogicalOperation::Nor: in operator <<()
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| H A D | PackedGLEnums_autogen.h | 260 Nor = 10, member in gl::LogicalOperation
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceInstMIPS32.h | 255 Nor, enumerator
1259 using InstMIPS32Nor = InstMIPS32ThreeAddrGPR<InstMIPS32::Nor>;
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| /third_party/node/deps/v8/src/codegen/loong64/ |
| H A D | macro-assembler-loong64.h | 397 DEFINE_INSTRUCTION(Nor)
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| H A D | macro-assembler-loong64.cc | 649 void TurboAssembler::Nor(Register rd, Register rj, const Operand& rk) { in CallRecordWriteStub() function in v8::internal::TurboAssembler
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| /third_party/node/deps/v8/src/compiler/backend/loong64/ |
| H A D | code-generator-loong64.cc | 1017 __ Nor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1020 __ Nor(i.OutputRegister(), i.InputRegister(0), zero_reg); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | code-generator-mips64.cc | 1046 __ Nor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1049 __ Nor(i.OutputRegister(), i.InputRegister(0), zero_reg); in AssembleArchInstruction()
1054 __ Nor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1057 __ Nor(i.OutputRegister(), i.InputRegister(0), zero_reg); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | code-generator-riscv64.cc | 1081 __ Nor(i.OutputRegister(), i.InputOrZeroRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1084 __ Nor(i.OutputRegister(), i.InputOrZeroRegister(0), zero_reg); in AssembleArchInstruction()
1089 __ Nor(i.OutputRegister(), i.InputOrZeroRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1093 __ Nor(i.OutputRegister(), i.InputOrZeroRegister(0), zero_reg); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | macro-assembler-mips.cc | 752 void TurboAssembler::Nor(Register rd, Register rs, const Operand& rt) { in CallRecordWriteStub() function in v8::internal::TurboAssembler
1509 Nor(scratch2, zero_reg, scratch3); in CallRecordWriteStub()
1566 Nor(scratch2, zero_reg, scratch3); in CallRecordWriteStub()
1623 Nor(scratch2, zero_reg, scratch3); in CallRecordWriteStub()
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| H A D | macro-assembler-mips.h | 451 DEFINE_INSTRUCTION(Nor)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 3329 SDValue Nor = in get64BitZExtCompare() local
3331 return SDValue(CurDAG->getMachineNode(PPC::RLDICL, dl, MVT::i64, Nor, in get64BitZExtCompare()
3490 SDValue Nor = in get64BitSExtCompare() local
3492 return SDValue(CurDAG->getMachineNode(PPC::SRADI, dl, MVT::i64, Nor, in get64BitSExtCompare()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | macro-assembler-mips64.h | 465 DEFINE_INSTRUCTION(Nor)
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| H A D | macro-assembler-mips64.cc | 885 void TurboAssembler::Nor(Register rd, Register rs, const Operand& rt) { in CallRecordWriteStub() function in v8::internal::TurboAssembler
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| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | macro-assembler-riscv64.h | 450 DEFINE_INSTRUCTION(Nor)
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| H A D | macro-assembler-riscv64.cc | 727 void TurboAssembler::Nor(Register rd, Register rs, const Operand& rt) { in Nor() function in v8::internal::TurboAssembler
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| /third_party/skia/third_party/externals/angle2/src/libANGLE/ |
| H A D | validationES1.cpp | 1143 case LogicalOperation::Nor: in ValidateLogicOp()
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| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | code-generator-mips.cc | 1035 __ Nor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1038 __ Nor(i.OutputRegister(), i.InputRegister(0), zero_reg); in AssembleArchInstruction()
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| /third_party/rust/crates/libc/src/ |
| H A D | psp.rs | 756 Nor = 8,
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| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.h | 5563 void Nor(const PRegisterWithLaneSize& pd, in Nor() function in vixl::aarch64::MacroAssembler
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| /third_party/vixl/test/aarch64/ |
| H A D | test-assembler-sve-aarch64.cc | 1090 __ Nor(p4.VnB(), p12.Zeroing(), p11.VnB(), p10.VnB());
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