Searched refs:Neon16 (Results 1 - 6 of 6) sorted by relevance
| /third_party/node/deps/v8/src/execution/arm/ |
| H A D | simulator-arm.cc | 3421 size = Neon16; in DecodeTypeVFP()
3437 case Neon16: { in DecodeTypeVFP()
4411 case Neon16: { in DecodeAdvancedSIMDTwoOrThreeRegisters()
4423 case Neon16: { in DecodeAdvancedSIMDTwoOrThreeRegisters()
4457 case Neon16: { in DecodeAdvancedSIMDTwoOrThreeRegisters()
4496 case Neon16: in DecodeAdvancedSIMDTwoOrThreeRegisters()
4519 case Neon16: in DecodeAdvancedSIMDTwoOrThreeRegisters()
4579 case Neon16: in DecodeAdvancedSIMDTwoOrThreeRegisters()
4598 case Neon16: in DecodeAdvancedSIMDTwoOrThreeRegisters()
4625 case Neon16 in DecodeAdvancedSIMDTwoOrThreeRegisters()
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| H A D | code-generator-arm.cc | 2510 __ vdup(Neon16, i.OutputSimd128Register(), i.InputRegister(0)); in AssembleArchInstruction()
2539 __ vneg(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction()
2543 ASSEMBLE_SIMD_SHIFT_LEFT(vshl, 4, Neon16, NeonS16); in AssembleArchInstruction()
2547 ASSEMBLE_SIMD_SHIFT_RIGHT(vshr, 4, Neon16, NeonS16); in AssembleArchInstruction()
2554 __ vadd(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction()
2564 __ vsub(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction()
2574 __ vmul(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction()
2589 __ vceq(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction()
2595 __ vceq(Neon16, dst, i.InputSimd128Register(0), in AssembleArchInstruction()
2621 ASSEMBLE_SIMD_SHIFT_RIGHT(vshr, 4, Neon16, NeonU1 in AssembleArchInstruction()
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| H A D | instruction-selector-arm.cc | 3031 g.UseImmediate(Neon16), g.UseImmediate(index % 8)); in VisitI8x16Shuffle()
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| /third_party/node/deps/v8/src/wasm/baseline/arm/ |
| H A D | liftoff-assembler-arm.h | 2366 vld1(Neon16, NeonListOperand(dst.low_fp()), in LoadTransform()
2370 vld1(Neon16, NeonListOperand(dst.low_fp()), in LoadTransform()
2400 vld1r(Neon16, NeonListOperand(liftoff::GetSimd128Register(dst)), in LoadTransform()
3219 vdup(Neon16, liftoff::GetSimd128Register(dst), src.gp());
3224 vneg(Neon16, liftoff::GetSimd128Register(dst),
3259 vpadd(Neon16, tmp.low(), tmp.low(), tmp.high());
3260 vpadd(Neon16, tmp.low(), tmp.low(), tmp.low());
3261 vpadd(Neon16, tmp.low(), tmp.low(), tmp.low());
3267 liftoff::EmitSimdShift<liftoff::kLeft, NeonS16, Neon16>(this, dst, lhs, rhs);
3279 liftoff::EmitSimdShift<liftoff::kRight, NeonS16, Neon16>(thi
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | constants-arm.h | 296 enum NeonSize { Neon8 = 0x0, Neon16 = 0x1, Neon32 = 0x2, Neon64 = 0x3 }; enumerator
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| H A D | assembler-arm.cc | 3931 case Neon16: in vdup()
5521 *this = LoadStoreLaneParams(laneidx, Neon16, 4); in LoadStoreLaneParams()
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