Searched refs:NEG_S (Results 1 - 9 of 9) sorted by relevance
/third_party/node/deps/v8/src/compiler/backend/mips64/ |
H A D | instruction-scheduler-mips64.cc | 445 NEG_S = 4, enumerator 1092 return Latency::NEG_S; in NegsLatency() 1095 return CompareIsNanF32Latency() + 2 * Latency::BRANCH + Latency::NEG_S + in NegsLatency()
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/third_party/node/deps/v8/src/compiler/backend/mips/ |
H A D | instruction-scheduler-mips.cc | 418 NEG_S = 4, enumerator 1173 return Latency::NEG_S; in Neg_sLatency() 1176 return CompareIsNanF32Latency() + 2 * Latency::BRANCH + Latency::NEG_S + in Neg_sLatency()
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/third_party/node/deps/v8/src/compiler/backend/riscv64/ |
H A D | instruction-scheduler-riscv64.cc | 446 NEG_S = 4, enumerator 959 return CompareIsNanF32Latency() + 2 * Latency::BRANCH + Latency::NEG_S + in NegsLatency()
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/third_party/node/deps/v8/src/codegen/mips64/ |
H A D | constants-mips64.h | 663 NEG_S = ((0U << 3) + 7),
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/third_party/node/deps/v8/src/codegen/mips/ |
H A D | constants-mips.h | 617 NEG_S = ((0U << 3) + 7),
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H A D | assembler-mips.cc | 2625 GenInstrRegister(COP1, S, f0, fs, fd, NEG_S); in neg_s()
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/third_party/pcre2/pcre2/src/sljit/ |
H A D | sljitNativeMIPS_common.c | 254 #define NEG_S (HI(17) | FMT_S | LO(7)) macro 2714 FAIL_IF(push_inst(compiler, NEG_S | FMT(op) | FS(src) | FD(dst_r), MOVABLE_INS)); in sljit_emit_fop1()
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/third_party/node/deps/v8/src/execution/mips64/ |
H A D | simulator-mips64.cc | 2776 case NEG_S: in DecodeTypeRegisterSRsType()
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/third_party/node/deps/v8/src/execution/mips/ |
H A D | simulator-mips.cc | 3256 case NEG_S: in DecodeTypeRegisterSRsType()
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