Searched refs:MTHC1 (Results 1 - 8 of 8) sorted by relevance
| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | instruction-scheduler-mips64.cc | 536 MTHC1 = 4, enumerator
1117 Latency::MTHC1; in Float64RoundLatency()
1600 Latency::MTC1 + Latency::MFC1 + Latency::MTHC1 + 1; in GetInstructionLatency()
1617 return Latency::MFHC1 + Latency::MTC1 + Latency::MTHC1; in GetInstructionLatency()
1621 return Latency::MTHC1; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | instruction-scheduler-mips.cc | 507 MTHC1 = 4, enumerator
857 return Latency::MFHC1 + Latency::MTC1 + Latency::MTHC1; in FmoveLowLatency()
1617 return Latency::MFHC1 + Latency::MTC1 + Latency::MTHC1; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | constants-mips64.h | 647 MTHC1 = ((0U << 3) + 7) << 21,
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| H A D | assembler-mips64.cc | 2683 GenInstrRegister(COP1, MTHC1, rt, fs, f0); in mthc1()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | constants-mips.h | 601 MTHC1 = ((0U << 3) + 7) << 21,
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| H A D | assembler-mips.cc | 2416 GenInstrRegister(COP1, MTHC1, rt, fs, f0); in mthc1()
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| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 3660 case MTHC1: in DecodeTypeRegisterCOP1()
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| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 3708 case MTHC1: in DecodeTypeRegisterCOP1()
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