Searched refs:MOV_D (Results 1 - 9 of 9) sorted by relevance
/third_party/node/deps/v8/src/compiler/backend/riscv64/ |
H A D | instruction-scheduler-riscv64.cc | 504 MOV_D = 4, enumerator 971 return Latency::MOVF_HIGH_DREG + 1 + Latency::BRANCH + Latency::MOV_D + 4 + in Float64RoundLatency() 994 Latency::MOVF_HIGH_DREG + Latency::MOV_D; in Float64MaxLatency() 1008 Latency::MOVF_HIGH_DREG + Latency::MOV_D; in Float64MinLatency() 1040 Latency::MOV_D + SltuLatency() + 4; in TruncUlDLatency()
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/third_party/node/deps/v8/src/compiler/backend/mips64/ |
H A D | instruction-scheduler-mips64.cc | 503 MOV_D = 4, enumerator 1115 return Latency::DMFC1 + 1 + Latency::BRANCH + Latency::MOV_D + 4 + in Float64RoundLatency() 1150 Latency::DMFC1 + Latency::MOV_D; in Float64MaxLatency() 1172 Latency::DMFC1 + Latency::MOV_D; in Float64MinLatency() 1204 3 * Latency::DMFC1 + OrLatency() + Latency::DMTC1 + Latency::MOV_D + in TruncUlDLatency()
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/third_party/node/deps/v8/src/compiler/backend/mips/ |
H A D | instruction-scheduler-mips.cc | 474 MOV_D = 4, enumerator 760 return Mfhc1Latency() + ExtLatency() + Latency::BRANCH + Latency::MOV_D + in Float64RoundLatency() 1213 return Latency::MOV_D; // Estimated max. in Move_dLatency()
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/third_party/node/deps/v8/src/codegen/mips64/ |
H A D | constants-mips64.h | 688 MOV_D = ((0U << 3) + 6),
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H A D | assembler-mips64.cc | 2892 GenInstrRegister(COP1, D, f0, fs, fd, MOV_D); in mov_d()
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/third_party/node/deps/v8/src/codegen/mips/ |
H A D | constants-mips.h | 643 MOV_D = ((0U << 3) + 6),
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H A D | assembler-mips.cc | 2617 GenInstrRegister(COP1, D, f0, fs, fd, MOV_D); in mov_d()
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/third_party/node/deps/v8/src/execution/mips64/ |
H A D | simulator-mips64.cc | 3204 case MOV_D: in DecodeTypeRegisterDRsType()
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/third_party/node/deps/v8/src/execution/mips/ |
H A D | simulator-mips.cc | 2823 case MOV_D: in DecodeTypeRegisterDRsType()
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