Searched refs:LoadStoreOp (Results 1 - 19 of 19) sorted by relevance
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | instructions-arm64.cc | 21 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsLoad()
52 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsStore()
156 unsigned CalcLSDataSize(LoadStoreOp op) { in CalcLSDataSize()
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| H A D | instructions-arm64.h | 53 unsigned CalcLSDataSize(LoadStoreOp op);
147 return CalcLSDataSize(static_cast<LoadStoreOp>(Mask(LoadStoreMask))); in SizeLS()
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| H A D | assembler-arm64-inl.h | 765 LoadStoreOp Assembler::LoadOpFor(const CPURegister& rt) { in LoadOpFor()
787 LoadStoreOp Assembler::StoreOpFor(const CPURegister& rt) { in StoreOpFor()
1034 unsigned Assembler::CalcLSDataSize(LoadStoreOp op) { in CalcLSDataSize()
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| H A D | assembler-arm64.h | 2204 inline static unsigned CalcLSDataSize(LoadStoreOp op);
2459 void LoadStore(const CPURegister& rt, const MemOperand& addr, LoadStoreOp op);
2504 // Find an appropriate LoadStoreOp or LoadStorePairOp for the specified
2507 static inline LoadStoreOp LoadOpFor(const CPURegister& rt);
2510 static inline LoadStoreOp StoreOpFor(const CPURegister& rt);
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| H A D | constants-arm64.h | 914 enum LoadStoreOp : uint32_t {
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| H A D | macro-assembler-arm64.h | 1517 LoadStoreOp op);
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| H A D | macro-assembler-arm64.cc | 861 const MemOperand& addr, LoadStoreOp op) { in LoadStoreMacro()
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| H A D | assembler-arm64.cc | 3952 LoadStoreOp op) { in LoadStore()
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| /third_party/vixl/src/aarch64/ |
| H A D | instructions-aarch64.cc | 493 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsLoad()
525 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsStore()
838 unsigned CalcLSDataSize(LoadStoreOp op) { in CalcLSDataSize()
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| H A D | instructions-aarch64.h | 168 unsigned CalcLSDataSize(LoadStoreOp op);
423 return CalcLSDataSize(static_cast<LoadStoreOp>(Mask(LoadStoreMask))); in GetSizeLS()
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| H A D | assembler-aarch64.h | 7841 LoadStoreOp op,
8107 // Find an appropriate LoadStoreOp or LoadStorePairOp for the specified
8110 static LoadStoreOp LoadOpFor(const CPURegister& rt);
8113 static LoadStoreOp StoreOpFor(const CPURegister& rt);
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| H A D | assembler-aarch64.cc | 6350 LoadStoreOp op,
6717 LoadStoreOp Assembler::LoadOpFor(const CPURegister& rt) {
6740 LoadStoreOp Assembler::StoreOpFor(const CPURegister& rt) {
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| H A D | macro-assembler-aarch64.cc | 2080 LoadStoreOp op) { in Emit()
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| H A D | constants-aarch64.h | 1135 enum LoadStoreOp { enum
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| H A D | simulator-aarch64.cc | 4286 LoadStoreOp op = static_cast<LoadStoreOp>(instr->Mask(LoadStoreMask)); in Simulator()
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| H A D | macro-assembler-aarch64.h | 920 LoadStoreOp op);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.cpp | 585 int LoadStoreOp = IsStore ? in buildMUBUFOffsetLoadStore() local
587 if (LoadStoreOp == -1) in buildMUBUFOffsetLoadStore()
595 BuildMI(*MBB, MI, DL, TII->get(LoadStoreOp)) in buildMUBUFOffsetLoadStore()
615 unsigned LoadStoreOp, in buildSpillLoadStore()
629 const MCInstrDesc &Desc = TII->get(LoadStoreOp); in buildSpillLoadStore()
614 buildSpillLoadStore(MachineBasicBlock::iterator MI, unsigned LoadStoreOp, int Index, unsigned ValueReg, bool IsKill, unsigned ScratchRsrcReg, unsigned ScratchOffsetReg, int64_t InstOffset, MachineMemOperand *MMO, RegScavenger *RS) const buildSpillLoadStore() argument
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| H A D | SIRegisterInfo.h | 295 unsigned LoadStoreOp,
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.cc | 2026 LoadStoreOp op = static_cast<LoadStoreOp>(instr->Mask(LoadStoreMask));
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