| /third_party/vixl/test/aarch32/ |
| H A D | test-assembler-aarch32.cc | 1730 __ Ldrsb(r2, &lit); in TEST()
1815 __ Ldrsb(r6, &l5); in TEST()
1871 __ Ldrsb(eq, r6, &l5); in TEST()
1872 __ Ldrsb(ne, r6, &l5_not_taken); in TEST()
1909 {&MacroAssembler::Ldrsb, r5, 255, 4095, 0x00000087, 0xffffff87}};
2125 __ Ldrsb(r6, &l5); in TEST()
2151 __ Ldrsb(lr, &l5); in TEST()
4051 __ Ldrsb(r3, literal); in TEST_T32()
4123 __ Ldrsb(r3, literal); in TEST_T32()
4217 __ Ldrsb(r in TEST_T32()
[all...] |
| H A D | test-disasm-a32.cc | 3430 COMPARE_T32(Ldrsb(eq, r5, MemOperand(r6, r7)), in TEST()
3434 COMPARE_T32(Ldrsb(eq, r6, MemOperand(r9)), in TEST()
4271 COMPARE_BOTH(Ldrsb(r0, MemOperand(pc, minus, 0)), "ldrsb r0, [pc, #-0]\n"); in TEST()
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| H A D | test-simulator-cond-rd-memop-immediate-512-a32.cc | 118 M(Ldrsb) \
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| H A D | test-simulator-cond-rd-memop-rs-a32.cc | 119 M(Ldrsb) \
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| /third_party/node/deps/v8/src/wasm/baseline/arm64/ |
| H A D | liftoff-assembler-arm64.h | 544 Ldrsb(dst.gp().W(), src_op); in Load()
547 Ldrsb(dst.gp().X(), src_op); in Load()
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| H A D | code-generator-arm64.cc | 1847 __ Ldrsb(i.OutputRegister(), i.MemoryOperand()); in AssembleArchInstruction()
1851 __ Ldrsb(i.OutputRegister32(), i.MemoryOperand()); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64.h | 39 V(Ldrsb, Register&, rt, rt.Is64Bits() ? LDRSB_x : LDRSB_w) \
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| H A D | macro-assembler-arm64.cc | 2445 Ldrsb(x4, MemOperand(x4)); in InvokeFunctionCode()
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| /third_party/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.h | 762 void Ldrsb(Condition cond, Register rt, RawLiteral* literal) { in MacroAssembler() function in vixl::aarch32::MacroAssembler
785 void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); } in MacroAssembler() function in vixl::aarch32::MacroAssembler
2599 void Ldrsb(Condition cond, Register rt, const MemOperand& operand) { in MacroAssembler() function in vixl::aarch32::MacroAssembler
2618 void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); } in MacroAssembler() function in vixl::aarch32::MacroAssembler
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| /third_party/vixl/test/aarch64/ |
| H A D | test-assembler-aarch64.cc | 3515 __ Ldrsb(w0, MemOperand(x24));
3516 __ Ldrsb(w1, MemOperand(x24, 4));
3519 __ Ldrsb(x4, MemOperand(x24));
3520 __ Ldrsb(x5, MemOperand(x24, 4));
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| H A D | test-assembler-sve-aarch64.cc | 8739 masm->Ldrsb(dst, MemOperand(addr));
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| /third_party/node/deps/v8/src/builtins/arm64/ |
| H A D | builtins-arm64.cc | 490 __ Ldrsb(x10, MemOperand(x10)); in Generate_ResumeGeneratorTrampoline()
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| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.h | 51 V(Ldrsb, Register&, rt, rt.Is64Bits() ? LDRSB_x : LDRSB_w) \
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