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Searched refs:Ldr (Results 1 - 25 of 80) sorted by relevance

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/third_party/vixl/test/aarch64/
H A Dtest-metadata-aarch64.cc60 __ Ldr(w0, MemOperand(tagged_heap_ptr, i * 32)); in TEST()
63 __ Ldr(x2, MemOperand(tagged_heap_ptr, 8)); in TEST()
97 __ Ldr(w0, MemOperand(x21)); in TEST()
101 __ Ldr(w0, MemOperand(tagged_heap_ptr, 320)); in TEST()
103 __ Ldr(w0, MemOperand(tagged_heap_ptr, -8)); in TEST()
117 __ Ldr(w0, MemOperand(x22)); in TEST()
H A Dtest-assembler-neon-aarch64.cc62 __ Ldr(b0, MemOperand(x17, sizeof(src[0]))); in TEST()
64 __ Ldr(b1, MemOperand(x19, sizeof(src[0]), PostIndex)); in TEST()
66 __ Ldr(b2, MemOperand(x21, 2 * sizeof(src[0]), PreIndex)); in TEST()
104 __ Ldr(h0, MemOperand(x17, sizeof(src[0]))); in TEST()
106 __ Ldr(h1, MemOperand(x19, sizeof(src[0]), PostIndex)); in TEST()
108 __ Ldr(h2, MemOperand(x21, 2 * sizeof(src[0]), PreIndex)); in TEST()
151 __ Ldr(q0, MemOperand(x17, 16)); in TEST()
153 __ Ldr(q1, MemOperand(x19, 16, PostIndex)); in TEST()
155 __ Ldr(q2, MemOperand(x21, 32, PreIndex)); in TEST()
200 __ Ldr(b in TEST()
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H A Dtest-simulator-sve2-aarch64.cc168 __ Ldr(w0, MemOperand(x0)); in TEST_SVE()
312 __ Ldr(w0, MemOperand(x0)); in TEST_SVE()
456 __ Ldr(w0, MemOperand(x0)); in TEST_SVE()
600 __ Ldr(w0, MemOperand(x0)); in TEST_SVE()
844 __ Ldr(w0, MemOperand(x0)); in TEST_SVE()
1088 __ Ldr(w0, MemOperand(x0)); in TEST_SVE()
1232 __ Ldr(w0, MemOperand(x0)); in TEST_SVE()
1376 __ Ldr(w0, MemOperand(x0)); in TEST_SVE()
1520 __ Ldr(w0, MemOperand(x0)); in TEST_SVE()
1692 __ Ldr(w in TEST_SVE()
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H A Dtest-simulator-aarch64.cc298 __ Ldr(fn, MemOperand(inputs_base, index_n, UXTW, n_index_shift)); in Test1Op_Helper()
444 __ Ldr(fn, MemOperand(inputs_base, index_n, UXTW, index_shift)); in Test2Op_Helper()
448 __ Ldr(fm, MemOperand(inputs_base, index_m, UXTW, index_shift)); in Test2Op_Helper()
588 __ Ldr(fn, MemOperand(inputs_base, index_n, UXTW, index_shift)); in Test3Op_Helper()
592 __ Ldr(fm, MemOperand(inputs_base, index_m, UXTW, index_shift)); in Test3Op_Helper()
596 __ Ldr(fa, MemOperand(inputs_base, index_a, UXTW, index_shift)); in Test3Op_Helper()
737 __ Ldr(fn, MemOperand(inputs_base, index_n, UXTW, index_shift)); in TestCmp_Helper()
741 __ Ldr(fm, MemOperand(inputs_base, index_m, UXTW, index_shift)); in TestCmp_Helper()
876 __ Ldr(fn, MemOperand(inputs_base, index_n, UXTW, index_shift)); in TestCmpZero_Helper()
1019 __ Ldr(f in TestFPToFixed_Helper()
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H A Dtest-simulator-sve-aarch64.cc159 __ Ldr(w0, MemOperand(x0)); in TEST_SVE()
243 __ Ldr(w0, MemOperand(x0)); in TEST_SVE()
/third_party/vixl/test/aarch32/
H A Dtest-disasm-a32.cc644 COMPARE_BOTH(Ldr(r0, MemOperand(r1, 0xfff123)), in TEST()
648 COMPARE_BOTH(Ldr(r0, MemOperand(r1, 0xff123)), in TEST()
651 COMPARE_BOTH(Ldr(r0, MemOperand(r1, -0xff123)), in TEST()
655 COMPARE_A32(Ldr(r0, MemOperand(r1, 0xfff123, PreIndex)), in TEST()
659 COMPARE_A32(Ldr(r0, MemOperand(r1, 0xff123, PreIndex)), in TEST()
662 COMPARE_A32(Ldr(r0, MemOperand(r1, -0xff123, PreIndex)), in TEST()
666 COMPARE_T32(Ldr(r0, MemOperand(r1, 0xfff12, PreIndex)), in TEST()
670 COMPARE_T32(Ldr(r0, MemOperand(r1, 0xff12, PreIndex)), in TEST()
673 COMPARE_T32(Ldr(r0, MemOperand(r1, -0xff12, PreIndex)), in TEST()
677 COMPARE_A32(Ldr(r in TEST()
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H A Dtest-assembler-aarch32.cc1185 __ Ldr(r0, &l1); in TEST()
1192 __ Ldr(r4, MemOperand(r4)); // Load the first 4 characters in r4. in TEST()
1221 __ Ldr(r0, &l1); in TEST()
1239 __ Ldr(r4, MemOperand(r4)); // Load the first 4 characters in r4. in TEST()
1277 // Ldrd below (if the pool is not already emitted due to the Ldr). in EmitReusedLoadLiteralStressTest()
1281 __ Ldr(r4, &big_literal); in EmitReusedLoadLiteralStressTest()
1286 __ Ldr(r0, &l1); in EmitReusedLoadLiteralStressTest()
1288 // Generate nops, in order to bring the checkpoints of the Ldr and Ldrd in EmitReusedLoadLiteralStressTest()
1534 __ Ldr(r4, MemOperand(r4)); // Load the first 4 characters in r4. in TEST()
1583 __ Ldr(r in TEST()
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H A Dtest-simulator-cond-rd-rn-rm-ge-a32.cc475 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); in TestHelper()
487 __ Ldr(q_bit, MemOperand(input_ptr, offsetof(Inputs, qbit))); in TestHelper()
494 __ Ldr(ge_bits, MemOperand(input_ptr, offsetof(Inputs, ge))); in TestHelper()
497 __ Ldr(rd, MemOperand(input_ptr, offsetof(Inputs, rd))); in TestHelper()
498 __ Ldr(rn, MemOperand(input_ptr, offsetof(Inputs, rn))); in TestHelper()
499 __ Ldr(rm, MemOperand(input_ptr, offsetof(Inputs, rm))); in TestHelper()
H A Dtest-simulator-cond-rd-rn-rm-ge-t32.cc475 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); in TestHelper()
487 __ Ldr(q_bit, MemOperand(input_ptr, offsetof(Inputs, qbit))); in TestHelper()
494 __ Ldr(ge_bits, MemOperand(input_ptr, offsetof(Inputs, ge))); in TestHelper()
497 __ Ldr(rd, MemOperand(input_ptr, offsetof(Inputs, rd))); in TestHelper()
498 __ Ldr(rn, MemOperand(input_ptr, offsetof(Inputs, rn))); in TestHelper()
499 __ Ldr(rm, MemOperand(input_ptr, offsetof(Inputs, rm))); in TestHelper()
H A Dtest-simulator-cond-rd-rn-rm-q-a32.cc459 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); in TestHelper()
471 __ Ldr(q_bit, MemOperand(input_ptr, offsetof(Inputs, qbit))); in TestHelper()
478 __ Ldr(ge_bits, MemOperand(input_ptr, offsetof(Inputs, ge))); in TestHelper()
481 __ Ldr(rd, MemOperand(input_ptr, offsetof(Inputs, rd))); in TestHelper()
482 __ Ldr(rn, MemOperand(input_ptr, offsetof(Inputs, rn))); in TestHelper()
483 __ Ldr(rm, MemOperand(input_ptr, offsetof(Inputs, rm))); in TestHelper()
H A Dtest-simulator-cond-rd-rn-rm-q-t32.cc459 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); in TestHelper()
471 __ Ldr(q_bit, MemOperand(input_ptr, offsetof(Inputs, qbit))); in TestHelper()
478 __ Ldr(ge_bits, MemOperand(input_ptr, offsetof(Inputs, ge))); in TestHelper()
481 __ Ldr(rd, MemOperand(input_ptr, offsetof(Inputs, rd))); in TestHelper()
482 __ Ldr(rn, MemOperand(input_ptr, offsetof(Inputs, rn))); in TestHelper()
483 __ Ldr(rm, MemOperand(input_ptr, offsetof(Inputs, rm))); in TestHelper()
H A Dtest-simulator-cond-rd-rn-rm-sel-a32.cc452 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); in TestHelper()
464 __ Ldr(q_bit, MemOperand(input_ptr, offsetof(Inputs, qbit))); in TestHelper()
471 __ Ldr(ge_bits, MemOperand(input_ptr, offsetof(Inputs, ge))); in TestHelper()
474 __ Ldr(rd, MemOperand(input_ptr, offsetof(Inputs, rd))); in TestHelper()
475 __ Ldr(rn, MemOperand(input_ptr, offsetof(Inputs, rn))); in TestHelper()
476 __ Ldr(rm, MemOperand(input_ptr, offsetof(Inputs, rm))); in TestHelper()
H A Dtest-simulator-cond-rd-rn-rm-sel-t32.cc452 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr))); in TestHelper()
464 __ Ldr(q_bit, MemOperand(input_ptr, offsetof(Inputs, qbit))); in TestHelper()
471 __ Ldr(ge_bits, MemOperand(input_ptr, offsetof(Inputs, ge))); in TestHelper()
474 __ Ldr(rd, MemOperand(input_ptr, offsetof(Inputs, rd))); in TestHelper()
475 __ Ldr(rn, MemOperand(input_ptr, offsetof(Inputs, rn))); in TestHelper()
476 __ Ldr(rm, MemOperand(input_ptr, offsetof(Inputs, rm))); in TestHelper()
/third_party/node/deps/v8/src/builtins/arm64/
H A Dbuiltins-arm64.cc184 __ Ldr(cp, MemOperand(fp, ConstructFrameConstants::kContextOffset)); in Generate_JSBuiltinsConstructStubHelper()
245 __ Ldr(w4, FieldMemOperand(x4, SharedFunctionInfo::kFlagsOffset)); in Generate_JSConstructStubGeneric()
282 __ Ldr(x1, MemOperand(fp, ConstructFrameConstants::kConstructorOffset)); in Generate_JSConstructStubGeneric()
400 __ Ldr(cp, MemOperand(fp, ConstructFrameConstants::kContextOffset)); in Generate_JSConstructStubGeneric()
406 __ Ldr(cp, MemOperand(fp, ConstructFrameConstants::kContextOffset)); in Generate_JSConstructStubGeneric()
424 __ Ldr(scratch, FieldMemOperand(code, CodeT::kFlagsOffset)); in AssertCodeTIsBaselineAllowClobber()
497 __ Ldr(x10, MemOperand(x10)); in Generate_ResumeGeneratorTrampoline()
694 __ Ldr(x10, MemOperand(x11)); // x10 = C entry FP. in Generate_JSEntryVariant()
707 __ Ldr(x11, MemOperand(x12)); // x11 = previous JS entry SP. in Generate_JSEntryVariant()
773 __ Ldr(x1 in Generate_JSEntryVariant()
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/third_party/node/deps/v8/src/codegen/arm64/
H A Dmacro-assembler-arm64.cc162 Ldr(temp, operand.immediate()); in LogicalMacro()
368 Ldr(dst, operand); in Mov()
583 Ldr(rd, operand.immediate()); in Mvn()
639 Ldr(temp, operand.immediate()); in ConditionalCompareMacro()
777 Ldr(temp, operand.immediate()); in AddSubMacro()
820 Ldr(temp, operand.immediate()); in AddSubWithCarryMacro()
1397 Ldr(temp0, MemOperand(src, src_direction * kSystemPointerSize, PostIndex)); in CopyDoubleWords()
1475 Ldr(destination, in LoadRoot()
1488 void TurboAssembler::Move(Register dst, MemOperand src) { Ldr(dst, src); } in Move()
1700 Ldr(kOffHeapTrampolineRegiste in JumpToOffHeapInstructionStream()
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/third_party/node/deps/v8/src/regexp/arm64/
H A Dregexp-macro-assembler-arm64.cc166 __ Ldr(w10, register_location(reg)); in AdvanceRegister()
197 __ Ldr(scratch, MemOperand(frame_pointer(), kBacktrackCount)); in Backtrack()
288 __ Ldr(w10, MemOperand(backtrack_stackpointer())); in CheckGreedyLoop()
753 __ Ldr(dst, MemOperand(dst)); in LoadRegExpStackPointerFromMemory()
769 __ Ldr(scratch, MemOperand(scratch)); in PushRegExpBasePointer()
778 __ Ldr(stack_pointer_out, in PopRegExpBasePointer()
781 __ Ldr(scratch, MemOperand(scratch)); in PopRegExpBasePointer()
863 __ Ldr(x10, MemOperand(x10)); in GetCode()
1071 __ Ldr(success_counter, MemOperand(frame_pointer(), kSuccessCounter)); in GetCode()
1077 __ Ldr(output_siz in GetCode()
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/third_party/vixl/examples/aarch64/
H A Dliteral.cc56 __ Ldr(x1, &manually_placed_literal); in LiteralExample()
57 __ Ldr(x2, &automatically_placed_literal); in LiteralExample()
H A Dgetting-started.cc41 __ Ldr(x1, 0x1122334455667788); in GenerateDemoFunction()
/third_party/node/deps/v8/src/wasm/baseline/arm64/
H A Dliftoff-assembler-arm64.h357 Ldr(stack_limit, in PatchPrepareStackFrame()
360 Ldr(stack_limit, MemOperand(stack_limit)); in PatchPrepareStackFrame()
429 Ldr(dst, liftoff::GetInstanceOperand()); in LoadInstanceFromFrame()
441 Ldr(dst.W(), src); in LoadFromInstance()
444 Ldr(dst, src); in LoadFromInstance()
486 Ldr(dst.X(), src_op); in LoadFullPointer()
561 Ldr(dst.gp().W(), src_op); in Load()
567 Ldr(dst.gp().X(), src_op); in Load()
570 Ldr(dst.fp().S(), src_op); in Load()
573 Ldr(ds in Load()
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/third_party/vixl/examples/aarch32/
H A Dgetting-started.cc38 __ Ldr(r1, 0x12345678); in GenerateDemo()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64AsmPrinter.cpp1132 MCInst Ldr; in EmitInstruction() local
1133 Ldr.setOpcode(AArch64::LDRXui); in EmitInstruction()
1134 Ldr.addOperand(MCOperand::createReg(AArch64::X1)); in EmitInstruction()
1135 Ldr.addOperand(MCOperand::createReg(AArch64::X0)); in EmitInstruction()
1136 Ldr.addOperand(SymTLSDescLo12); in EmitInstruction()
1137 Ldr.addOperand(MCOperand::createImm(0)); in EmitInstruction()
1138 EmitToStreamer(*OutStreamer, Ldr); in EmitInstruction()
/third_party/node/deps/v8/src/baseline/arm64/
H A Dbaseline-assembler-arm64-inl.h205 __ Ldr(tmp, operand); in JumpIfPointer()
225 __ Ldr(tmp, operand); in JumpIfTagged()
233 __ Ldr(tmp, operand); in JumpIfTagged()
492 __ Ldr(interrupt_budget, in AddToInterruptBudgetAndJumpIfNotExceeded()
515 __ Ldr(interrupt_budget, in AddToInterruptBudgetAndJumpIfNotExceeded()
/third_party/vixl/benchmarks/aarch32/
H A Dbench-literal.cc59 __ Ldr(r0, j); in benchmark()
/third_party/node/deps/v8/src/compiler/backend/arm64/
H A Dcode-generator-arm64.cc671 __ Ldr(scratch.W(), in BailoutIfDeoptimized()
1531 __ Ldr(i.OutputDoubleRegister(), MemOperand(fp, offset)); in AssembleArchInstruction()
1533 __ Ldr(i.OutputFloatRegister(), MemOperand(fp, offset)); in AssembleArchInstruction()
1536 __ Ldr(i.OutputSimd128Register(), MemOperand(fp, offset)); in AssembleArchInstruction()
1539 __ Ldr(i.OutputRegister(), MemOperand(fp, offset)); in AssembleArchInstruction()
1879 __ Ldr(i.OutputRegister32(), i.MemoryOperand()); in AssembleArchInstruction()
1887 __ Ldr(i.OutputRegister(), i.MemoryOperand()); in AssembleArchInstruction()
1932 __ Ldr(i.OutputDoubleRegister().S(), i.MemoryOperand()); in AssembleArchInstruction()
1940 __ Ldr(i.OutputDoubleRegister(), i.MemoryOperand()); in AssembleArchInstruction()
1948 __ Ldr( in AssembleArchInstruction()
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/third_party/vixl/test/
H A Dtest-code-generation-scopes.cc396 __ Ldr(aarch64::x0, 0x1234567890abcdef); in TEST()
467 __ Ldr(aarch64::x0, 0x1234567890abcdef); in TEST()
744 __ Ldr(aarch64::x10, 0x1234567890abcdef); in TEST()
752 // otherwise the `Ldr` will run out of range when we generate the `nop` in TEST()

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