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Help
Searched
refs:LaneCount
(Results
1 - 6
of
6
) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H
A
D
X86InterleavedAccess.cpp
439
int
LaneCount
= std::max(VectorSize / 128, 1);
in createShuffleStride()
local
440
for (int Lane = 0; Lane <
LaneCount
; Lane++)
in createShuffleStride()
441
for (int i = 0, LaneSize = VF /
LaneCount
; i != LaneSize; ++i)
in createShuffleStride()
H
A
D
X86ISelLowering.cpp
14874
int
LaneCount
= VT.getSizeInBits() / 128;
14875
int LaneSize = Size /
LaneCount
;
14877
LaneInputs[0].resize(
LaneCount
, false);
14878
LaneInputs[1].resize(
LaneCount
, false);
[all...]
/third_party/node/deps/v8/src/codegen/arm64/
H
A
D
assembler-arm64.h
2209
switch (vd.
LaneCount
()) {
2221
switch (vd.
LaneCount
()) {
2239
if (vd.
LaneCount
() == 1) {
2246
if (vd.
LaneCount
() == 2) {
2252
DCHECK((vd.
LaneCount
() == 4) && vd.Is128Bits());
2259
switch (vd.
LaneCount
()) {
2273
switch (vd.
LaneCount
()) {
H
A
D
register-arm64.h
408
int
LaneCount
() const { return lane_count_; }
in LaneCount()
function in v8::internal::VRegister
H
A
D
assembler-arm64.cc
2278
offset = (offset / vt.
LaneCount
()) * 1;
in LoadStoreStructVerify()
2290
offset = (offset / vt.
LaneCount
()) * 2;
in LoadStoreStructVerify()
2302
offset = (offset / vt.
LaneCount
()) * 3;
in LoadStoreStructVerify()
2314
offset = (offset / vt.
LaneCount
()) * 4;
in LoadStoreStructVerify()
3484
DCHECK((0 <= index) && (index < vd.
LaneCount
()));
in ext()
/third_party/node/deps/v8/src/wasm/baseline/arm64/
H
A
D
liftoff-assembler-arm64.h
173
DCHECK_EQ(dst.
LaneCount
(), LaneCountFromFormat(format));
in EmitSimdShift()
Completed in 51 milliseconds