Searched refs:LDC1 (Results 1 - 13 of 13) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 226 case Mips::LDC1: in isBasePlusOffsetMemoryAccess()
|
| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | instruction-scheduler-mips64.cc | 539 LDC1 = 4, enumerator
889 int Ldc1Latency() { return AdjustBaseAndOffsetLatency() + Latency::LDC1; } in Ldc1Latency()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 50 (Opc == Mips::LWC1) || (Opc == Mips::LDC1) || (Opc == Mips::LDC164)) { in isLoadFromStackSlot()
347 Opc = Mips::LDC1; in loadRegFromStack()
|
| H A D | MipsInstructionSelector.cpp | 226 return isStore ? Mips::SDC1 : Mips::LDC1; in selectLoadStoreOpCode()
|
| H A D | MipsFastISel.cpp | 786 Opc = Mips::LDC1; in emitLoad()
|
| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | constants-mips64.h | 478 LDC1 = ((6U << 3) + 5) << kOpcodeShift,
1322 OpcodeToBitNumber(LWC1) | OpcodeToBitNumber(LDC1) |
|
| H A D | assembler-mips64.cc | 2667 GenInstrImmediate(LDC1, src.rm(), fd, src.offset_); in ldc1()
|
| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | constants-mips.h | 484 LDC1 = ((6U << 3) + 5) << kOpcodeShift,
1270 OpcodeToBitNumber(LWC1) | OpcodeToBitNumber(LDC1) |
|
| /third_party/pcre2/pcre2/src/sljit/ |
| H A D | sljitNativeMIPS_common.c | 228 #define LDC1 (HI(53)) macro
926 FAIL_IF(push_inst(compiler, LDC1 | base | FT(float_arg_count) | IMM(local_size + (arg_count << 2)), MOVABLE_INS)); in sljit_emit_enter()
1091 FAIL_IF(push_inst(compiler, LDC1 | S(SLJIT_SP) | FT(i) | IMM(offset), MOVABLE_INS)); in emit_stack_frame_release()
1096 FAIL_IF(push_inst(compiler, LDC1 | S(SLJIT_SP) | FT(i) | IMM(offset), MOVABLE_INS)); in emit_stack_frame_release()
|
| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | instruction-scheduler-mips.cc | 510 LDC1 = 4, enumerator
|
| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 7129 case LDC1:
|
| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 6756 case LDC1:
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3532 TOut.emitRRX(Is64FPU ? Mips::LDC164 : Mips::LDC1, FirstReg, TmpReg, in expandLoadDoubleImmToFPR()
|
Completed in 53 milliseconds