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Searched refs:K0 (Results 1 - 18 of 18) sorted by relevance

/third_party/ffmpeg/libavutil/
H A Dxtea.c83 #define DSTEP(SUM, K0, K1) \ in xtea_crypt_ecb()
84 v1 -= (((v0 << 4) ^ (v0 >> 5)) + v0) ^ (SUM + K0); \ in xtea_crypt_ecb()
136 #define ESTEP(SUM, K0, K1) \ in xtea_crypt_ecb()
137 v0 += (((v1 << 4) ^ (v1 >> 5)) + v1) ^ (SUM + K0);\ in xtea_crypt_ecb()
/third_party/skia/tools/viewer/
H A DTouchGesture.cpp68 const float K0 = 5; in evaluateMatrix() local
70 const float speed = fSpeed0 * (sk_float_exp(- K0 * t) - K1); in evaluateMatrix()
75 float dist = (fSpeed0 - speed) / K0; in evaluateMatrix()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
H A DMipsSEFrameLowering.cpp598 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::MFC0), Mips::K0) in emitInterruptPrologueStub()
603 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::EXT), Mips::K0) in emitInterruptPrologueStub()
604 .addReg(Mips::K0) in emitInterruptPrologueStub()
641 SrcReg = Mips::K0; in emitInterruptPrologueStub()
823 Reg = Mips::K0; in spillCalleeSavedRegisters()
828 BuildMI(MBB, MI, DL, TII.get(Op), Mips::K0) in spillCalleeSavedRegisters()
H A DMipsSEInstrInfo.cpp299 BuildMI(MBB, I, DL, get(Mips::MFHI), Mips::K0); in storeRegToStack()
300 SrcReg = Mips::K0; in storeRegToStack()
305 BuildMI(MBB, I, DL, get(Mips::MFLO), Mips::K0); in storeRegToStack()
306 SrcReg = Mips::K0; in storeRegToStack()
380 // Load HI/LO through K0. Notably the DestReg is encoded into the in loadRegFromStack()
382 unsigned Reg = Mips::K0; in loadRegFromStack()
H A DMipsRegisterInfo.cpp152 Mips::ZERO, Mips::K0, Mips::K1, Mips::SP in getReservedRegs()
H A DMicroMipsSizeReduction.cpp383 Mips::S6, Mips::S7, Mips::T8, Mips::T9, Mips::K0, Mips::K1, Mips::GP, in ConsecutiveRegisters()
/third_party/typescript/tests/baselines/reference/
H A DkeyofAndIndexedAccessErrors.js11 type T00 = keyof K0; // Error
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.h321 ENTRY(K0) \
H A DX86Disassembler.cpp2222 mcInst.addOperand(MCOperand::createReg(X86::K0 + maskRegNum)); in translateMaskRegister()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
H A DX86InstPrinterCommon.cpp349 printRegName(OS, X86::K0); in printVKPair()
H A DX86MCTargetDesc.cpp260 {codeview::RegisterId::AMD64_K0, X86::K0}, in initLLVMToSEHAndCVRegMapping()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/
H A DX86Operand.h521 case X86::K0: in addMaskPairOperands()
H A DX86AsmParser.cpp2176 if (RegNo == X86::K0) in HandleAVX512Operand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp7665 const SDValue K0 = DAG.getConstantFP(K0Val, SL, MVT::f32); in lowerFDIV_FAST() local
7675 SDValue r2 = DAG.getSetCC(SL, SetCCVT, r1, K0, ISD::SETOGT); in lowerFDIV_FAST()
9046 ConstantSDNode *K0 = dyn_cast<ConstantSDNode>(Op0.getOperand(1)); in performIntMed3ImmCombine()
9047 if (!K0) in performIntMed3ImmCombine()
9051 if (K0->getAPIntValue().sge(K1->getAPIntValue())) in performIntMed3ImmCombine()
9054 if (K0->getAPIntValue().uge(K1->getAPIntValue())) in performIntMed3ImmCombine()
9058 EVT VT = K0->getValueType(0); in performIntMed3ImmCombine()
9062 Op0.getOperand(0), SDValue(K0, 0), SDValue(K1, 0)); in performIntMed3ImmCombine()
9097 ConstantFPSDNode *K0 = getSplatConstantFP(Op0.getOperand(1)); in performFPMed3ImmCombine()
9098 if (!K0) in performFPMed3ImmCombine()
[all...]
H A DAMDGPUISelLowering.cpp2589 SDValue K0 = DAG.getConstantFP(BitsToDouble(UINT64_C(0x3df0000000000000)), SL, in LowerFP64_TO_INT() local
2594 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, Trunc, K0); in LowerFP64_TO_INT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp4223 case X86::KSET0W: return Expand2AddrKreg(MIB, get(X86::KXORWrr), X86::K0); in expandPostRAPseudo()
4224 case X86::KSET0D: return Expand2AddrKreg(MIB, get(X86::KXORDrr), X86::K0); in expandPostRAPseudo()
4225 case X86::KSET0Q: return Expand2AddrKreg(MIB, get(X86::KXORQrr), X86::K0); in expandPostRAPseudo()
4226 case X86::KSET1W: return Expand2AddrKreg(MIB, get(X86::KXNORWrr), X86::K0); in expandPostRAPseudo()
4227 case X86::KSET1D: return Expand2AddrKreg(MIB, get(X86::KXNORDrr), X86::K0); in expandPostRAPseudo()
4228 case X86::KSET1Q: return Expand2AddrKreg(MIB, get(X86::KXNORQrr), X86::K0); in expandPostRAPseudo()
/third_party/ffmpeg/libavcodec/x86/
H A Dvp8dsp_loopfilter.asm61 movd m%4, [%12+%10*2] ; K0-3
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp3224 case Mips::T9: return Mips::K0; in nextReg()
3225 case Mips::K0: return Mips::K1; in nextReg()
5413 case Mips::F26: return Mips::K0; in getRegisterForMxtrFP()
5452 case Mips::COP026: return Mips::K0; in getRegisterForMxtrC0()

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