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Searched refs:IsLaneSizeB (Results 1 - 6 of 6) sorted by relevance

/third_party/vixl/src/aarch64/
H A Dassembler-sve-aarch64.cc3638 VIXL_ASSERT((shift < 8) || !zd.IsLaneSizeB()); in dup()
5384 VIXL_ASSERT(pd.IsLaneSizeB() && pn.IsLaneSizeB()); in brka()
5394 VIXL_ASSERT(pd.IsLaneSizeB() && pn.IsLaneSizeB()); in brkas()
5404 VIXL_ASSERT(pd.IsLaneSizeB() && pn.IsLaneSizeB()); in brkb()
5414 VIXL_ASSERT(pd.IsLaneSizeB() && pn.IsLaneSizeB()); in brkbs()
5425 VIXL_ASSERT(pd.IsLaneSizeB() in brkn()
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H A Dregisters-aarch64.h168 bool IsLaneSizeB() const { return lane_size_ == kEncodedBRegSize; }
363 bool Is8B() const { return IsD() && IsLaneSizeB(); }
364 bool Is16B() const { return IsQ() && IsLaneSizeB(); }
H A Dassembler-aarch64.cc4492 VIXL_ASSERT(vd.IsVector() && !vd.IsLaneSizeB());
4506 VIXL_ASSERT(vd.IsVector() && !vd.IsLaneSizeB());
5804 VIXL_ASSERT(vn.IsLaneSizeB() && vm.IsLaneSizeB());
5813 VIXL_ASSERT(vn.IsLaneSizeB() && vm.IsLaneSizeB());
5822 VIXL_ASSERT(vn.IsLaneSizeB() && vm.IsLaneSizeB());
H A Dmacro-assembler-sve-aarch64.cc1036 VIXL_ASSERT(pd.IsLaneSizeB()); in Pfirst()
1037 VIXL_ASSERT(pn.IsLaneSizeB()); in Pfirst()
H A Dmacro-assembler-aarch64.h5745 VIXL_ASSERT(!pd.HasLaneSize() || pd.IsLaneSizeB()); in Rdffr()
6530 VIXL_ASSERT(!pn.HasLaneSize() || pn.IsLaneSizeB()); in Wrffr()
/third_party/node/deps/v8/src/codegen/arm64/
H A Dregister-arm64.h396 bool IsLaneSizeB() const { return LaneSizeInBits() == kBRegSizeInBits; } in IsLaneSizeB() function in v8::internal::VRegister

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