Searched refs:Inst (Results 1 - 25 of 425) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/Disassembler/
H A D	SystemZDisassembler.cpp	82 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass() argument 88 Inst.addOperand(MCOperand::createReg(RegNo)); in decodeRegisterClass() 92 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, 95 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs, 16); 98 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, 101 return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs, 16); 104 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, 107 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR64Regs, 16); 110 static DecodeStatus DecodeGR128BitRegisterClass(MCInst &Inst, uint64_t RegNo, 113 return decodeRegisterClass(Inst, RegN [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/Disassembler/
H A D	XCoreDisassembler.cpp	75 static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst, 80 static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst, 85 static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val, 88 static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val, 91 static DecodeStatus Decode2RInstruction(MCInst &Inst, 96 static DecodeStatus Decode2RImmInstruction(MCInst &Inst, 101 static DecodeStatus DecodeR2RInstruction(MCInst &Inst, 106 static DecodeStatus Decode2RSrcDstInstruction(MCInst &Inst, 111 static DecodeStatus DecodeRUSInstruction(MCInst &Inst, 116 static DecodeStatus DecodeRUSBitpInstruction(MCInst &Inst, 198 DecodeGRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGRRegsRegisterClass() argument 210 DecodeRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeRRegsRegisterClass() argument 222 DecodeBitpOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeBitpOperand() argument 233 DecodeNegImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeNegImmOperand() argument 274 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) Decode2OpInstructionFail() argument 344 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) Decode2RInstruction() argument 357 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) Decode2RImmInstruction() argument 370 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeR2RInstruction() argument 383 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) Decode2RSrcDstInstruction() argument 397 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeRUSInstruction() argument 410 DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeRUSBitpInstruction() argument 423 DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeRUSSrcDstBitpInstruction() argument 437 DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeL2OpInstructionFail() argument 508 DecodeL2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeL2RInstruction() argument 522 DecodeLR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeLR2RInstruction() argument 536 Decode3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) Decode3RInstruction() argument 549 Decode3RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) Decode3RImmInstruction() argument 562 Decode2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) Decode2RUSInstruction() argument 575 Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) Decode2RUSBitpInstruction() argument 588 DecodeL3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeL3RInstruction() argument 602 DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeL3RSrcDstInstruction() argument 617 DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeL2RUSInstruction() argument 631 DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeL2RUSBitpInstruction() argument 645 DecodeL6RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeL6RInstruction() argument 665 DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeL5RInstructionFail() argument 679 DecodeL5RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeL5RInstruction() argument 699 DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeL4RSrcDstInstruction() argument 718 DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeL4RSrcDstSrcDstInstruction() argument [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/
H A D	ARMDisassembler.cpp	177 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, 179 static DecodeStatus DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo, 181 static DecodeStatus DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo, 183 static DecodeStatus DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo, 185 static DecodeStatus DecodeGPRnopcRegisterClass(MCInst &Inst, 188 static DecodeStatus DecodeGPRwithAPSRRegisterClass(MCInst &Inst, 191 static DecodeStatus DecodeGPRwithZRRegisterClass(MCInst &Inst, 195 MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder); 196 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, 198 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigne 1127 DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPRRegisterClass() argument 1137 DecodeCLRMGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeCLRMGPRRegisterClass() argument 1152 DecodeGPRnopcRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPRnopcRegisterClass() argument 1165 DecodeGPRwithAPSRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPRwithAPSRRegisterClass() argument 1180 DecodeGPRwithZRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPRwithZRRegisterClass() argument 1198 DecodeGPRwithZRnospRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPRwithZRnospRegisterClass() argument 1207 DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodetGPRRegisterClass() argument 1219 DecodeGPRPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPRPairRegisterClass() argument 1234 DecodeGPRspRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPRspRegisterClass() argument 1245 DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodetcGPRRegisterClass() argument 1275 DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecoderGPRRegisterClass() argument 1300 DecodeSPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeSPRRegisterClass() argument 1310 DecodeHPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeHPRRegisterClass() argument 1326 DecodeDPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeDPRRegisterClass() argument 1341 DecodeDPR_8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeDPR_8RegisterClass() argument 1348 DecodeSPR_8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeSPR_8RegisterClass() argument 1356 DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeDPR_VFP2RegisterClass() argument 1370 DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeQPRRegisterClass() argument 1390 DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeDPairRegisterClass() argument 1411 DecodeDPairSpacedRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeDPairSpacedRegisterClass() argument 1423 DecodePredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodePredicateOperand() argument 1440 DecodeCCOutOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeCCOutOperand() argument 1449 DecodeSORegImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeSORegImmOperand() argument 1486 DecodeSORegRegOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeSORegRegOperand() argument 1521 DecodeRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeRegListOperand() argument 1568 DecodeSPRRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeSPRRegListOperand() argument 1592 DecodeDPRRegListOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeDPRRegListOperand() argument 1617 DecodeBitfieldMaskOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeBitfieldMaskOperand() argument 1644 DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeCopMemInstruction() argument 1823 DecodeAddrMode2IdxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeAddrMode2IdxInstruction() argument 1928 DecodeSORegMemOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeSORegMemOperand() argument 1972 DecodeAddrMode3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeAddrMode3Instruction() argument 2163 DecodeRFEInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeRFEInstruction() argument 2192 DecodeQADDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeQADDInstruction() argument 2215 DecodeMemMultipleWritebackInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMemMultipleWritebackInstruction() argument 2307 DecodeHINTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeHINTInstruction() argument 2329 DecodeCPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeCPSInstruction() argument 2376 DecodeT2CPSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeT2CPSInstruction() argument 2418 DecodeT2MOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeT2MOVTWInstruction() argument 2442 DecodeArmMOVTWInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeArmMOVTWInstruction() argument 2469 DecodeSMLAInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSMLAInstruction() argument 2497 DecodeTSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeTSTInstruction() argument 2518 DecodeSETPANInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSETPANInstruction() argument 2546 DecodeAddrModeImm12Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeAddrModeImm12Operand() argument 2566 DecodeAddrMode5Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeAddrMode5Operand() argument 2586 DecodeAddrMode5FP16Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeAddrMode5FP16Operand() argument 2606 DecodeAddrMode7Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeAddrMode7Operand() argument 2612 DecodeT2BInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeT2BInstruction() argument 2639 DecodeBranchImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeBranchImmInstruction() argument 2664 DecodeAddrMode6Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeAddrMode6Operand() argument 2681 DecodeVLDInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLDInstruction() argument 2957 DecodeVLDST1Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLDST1Instruction() argument 2970 DecodeVLDST2Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLDST2Instruction() argument 2985 DecodeVLDST3Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLDST3Instruction() argument 2998 DecodeVLDST4Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLDST4Instruction() argument 3008 DecodeVSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVSTInstruction() argument 3278 DecodeVLD1DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLD1DupInstruction() argument 3325 DecodeVLD2DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLD2DupInstruction() argument 3373 DecodeVLD3DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLD3DupInstruction() argument 3408 DecodeVLD4DupInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLD4DupInstruction() argument 3461 DecodeVMOVModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVMOVModImmInstruction() argument 3507 DecodeMVEModImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMVEModImmInstruction() argument 3535 DecodeMVEVADCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMVEVADCInstruction() argument 3560 DecodeVSHLMaxInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVSHLMaxInstruction() argument 3579 DecodeShiftRight8Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeShiftRight8Imm() argument 3585 DecodeShiftRight16Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeShiftRight16Imm() argument 3591 DecodeShiftRight32Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeShiftRight32Imm() argument 3597 DecodeShiftRight64Imm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeShiftRight64Imm() argument 3603 DecodeTBLInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeTBLInstruction() argument 3639 DecodeThumbAddSpecialReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) DecodeThumbAddSpecialReg() argument 3663 DecodeThumbBROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeThumbBROperand() argument 3671 DecodeT2BROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2BROperand() argument 3679 DecodeThumbCmpBROperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeThumbCmpBROperand() argument 3687 DecodeThumbAddrModeRR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeThumbAddrModeRR() argument 3702 DecodeThumbAddrModeIS(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeThumbAddrModeIS() argument 3716 DecodeThumbAddrModePC(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeThumbAddrModePC() argument 3726 DecodeThumbAddrModeSP(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeThumbAddrModeSP() argument 3734 DecodeT2AddrModeSOReg(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2AddrModeSOReg() argument 3763 DecodeT2LoadShift(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeT2LoadShift() argument 3846 DecodeT2LoadImm8(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) DecodeT2LoadImm8() argument 3930 DecodeT2LoadImm12(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) DecodeT2LoadImm12() argument 4010 DecodeT2LoadT(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) DecodeT2LoadT() argument 4049 DecodeT2LoadLabel(MCInst &Inst, unsigned Insn, uint64_t Address, const void* Decoder) DecodeT2LoadLabel() argument 4102 DecodeT2Imm8S4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2Imm8S4() argument 4116 DecodeT2Imm7S4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2Imm7S4() argument 4131 DecodeT2AddrModeImm8s4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2AddrModeImm8s4() argument 4146 DecodeT2AddrModeImm7s4(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2AddrModeImm7s4() argument 4162 DecodeT2AddrModeImm0_1020s4(MCInst &Inst,unsigned Val, uint64_t Address, const void *Decoder) DecodeT2AddrModeImm0_1020s4() argument 4177 DecodeT2Imm8(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2Imm8() argument 4190 DecodeT2Imm7(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2Imm7() argument 4204 DecodeT2AddrModeImm8(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2AddrModeImm8() argument 4251 DecodeTAddrModeImm7(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeTAddrModeImm7() argument 4268 DecodeT2AddrModeImm7(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2AddrModeImm7() argument 4286 DecodeT2LdStPre(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeT2LdStPre() argument 4347 DecodeT2AddrModeImm12(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2AddrModeImm12() argument 4373 DecodeThumbAddSPImm(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) DecodeThumbAddSPImm() argument 4384 DecodeThumbAddSPReg(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) DecodeThumbAddSPReg() argument 4409 DecodeThumbCPS(MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) DecodeThumbCPS() argument 4420 DecodePostIdxReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodePostIdxReg() argument 4433 DecodeMveAddrModeRQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMveAddrModeRQ() argument 4448 DecodeMveAddrModeQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMveAddrModeQ() argument 4470 DecodeThumbBLXOffset(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeThumbBLXOffset() argument 4494 DecodeCoprocessor(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeCoprocessor() argument 4510 DecodeThumbTableBranch(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeThumbTableBranch() argument 4526 DecodeThumb2BCCInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeThumb2BCCInstruction() argument 4568 DecodeT2SOImm(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeT2SOImm() argument 4600 DecodeThumbBCCTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeThumbBCCTargetOperand() argument 4608 DecodeThumbBLTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeThumbBLTargetOperand() argument 4632 DecodeMemBarrierOption(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeMemBarrierOption() argument 4641 DecodeInstSyncBarrierOption(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeInstSyncBarrierOption() argument 4650 DecodeMSRMask(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeMSRMask() argument 4732 DecodeBankedReg(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeBankedReg() argument 4747 DecodeDoubleRegLoad(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeDoubleRegLoad() argument 4768 DecodeDoubleRegStore(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeDoubleRegStore() argument 4794 DecodeLDRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeLDRPreImm() argument 4819 DecodeLDRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeLDRPreReg() argument 4846 DecodeSTRPreImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSTRPreImm() argument 4871 DecodeSTRPreReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSTRPreReg() argument 4896 DecodeVLD1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLD1LN() argument 4963 DecodeVST1LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVST1LN() argument 5028 DecodeVLD2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLD2LN() argument 5095 DecodeVST2LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVST2LN() argument 5158 DecodeVLD3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLD3LN() argument 5228 DecodeVST3LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVST3LN() argument 5291 DecodeVLD4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVLD4LN() argument 5372 DecodeVST4LN(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVST4LN() argument 5444 DecodeVMOVSRR(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVMOVSRR() argument 5470 DecodeVMOVRRS(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVMOVRRS() argument 5496 DecodeIT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeIT() argument 5526 DecodeT2LDRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeT2LDRDPreInstruction() argument 5563 DecodeT2STRDPreInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeT2STRDPreInstruction() argument 5597 DecodeT2Adr(MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) DecodeT2Adr() argument 5623 DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val, uint64_t Address, const void *Decoder) DecodeT2ShifterImmOperand() argument 5634 DecodeSwap(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSwap() argument 5661 DecodeVCVTD(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVCVTD() argument 5720 DecodeVCVTQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVCVTQ() argument 5779 DecodeNEONComplexLane64Instruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeNEONComplexLane64Instruction() argument 5812 DecodeLDR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeLDR() argument 5839 DecoderForMRRC2AndMCRR2(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecoderForMRRC2AndMCRR2() argument 5884 DecodeForVMRSandVMSR(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeForVMRSandVMSR() argument 5936 DecodeBFLabelOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeBFLabelOperand() argument 5955 DecodeBFAfterTargetOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeBFAfterTargetOperand() argument 5967 DecodePredNoALOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodePredNoALOperand() argument 5976 DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeLOLoop() argument 6038 DecodeLongShiftOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeLongShiftOperand() argument 6051 DecodetGPROddRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodetGPROddRegisterClass() argument 6061 DecodetGPREvenRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodetGPREvenRegisterClass() argument 6071 DecodeVSCCLRM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeVSCCLRM() argument 6097 DecodeMQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeMQPRRegisterClass() argument 6113 DecodeQQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeQQPRRegisterClass() argument 6129 DecodeQQQQPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeQQQQPRRegisterClass() argument 6140 DecodeVPTMaskOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeVPTMaskOperand() argument 6171 DecodeVpredROperand(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeVpredROperand() argument 6183 DecodeRestrictedIPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeRestrictedIPredicateOperand() argument 6191 DecodeRestrictedSPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeRestrictedSPredicateOperand() argument 6214 DecodeRestrictedUPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeRestrictedUPredicateOperand() argument 6222 DecodeRestrictedFPPredicateOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeRestrictedFPPredicateOperand() argument 6253 DecodeVCVTImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeVCVTImmOperand() argument 6296 DecodeVSTRVLDR_SYSREG(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeVSTRVLDR_SYSREG() argument 6339 DecodeMVE_MEM_pre( MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder, unsigned Rn, OperandDecoder RnDecoder, OperandDecoder AddrDecoder) DecodeMVE_MEM_pre() argument 6359 DecodeMVE_MEM_1_pre(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeMVE_MEM_1_pre() argument 6368 DecodeMVE_MEM_2_pre(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeMVE_MEM_2_pre() argument 6377 DecodeMVE_MEM_3_pre(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeMVE_MEM_3_pre() argument 6386 DecodePowerTwoOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodePowerTwoOperand() argument 6399 DecodeExpandedImmOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeExpandedImmOperand() argument 6409 DecodeMVEPairVectorIndexOperand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) DecodeMVEPairVectorIndexOperand() argument 6419 DecodeMVEVMOVQtoDReg(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMVEVMOVQtoDReg() argument 6442 DecodeMVEVMOVDRegtoQ(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMVEVMOVDRegtoQ() argument 6467 DecodeMVEOverlappingLongShift( MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMVEOverlappingLongShift() argument 6546 DecodeMVEVCVTt1fp(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMVEVCVTt1fp() argument 6566 DecodeMVEVCMP(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMVEVCMP() argument 6603 DecodeMveVCTP(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMveVCTP() argument 6613 DecodeMVEVPNOT(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMVEVPNOT() argument 6621 DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeT2AddSubSPImm() argument [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/Disassembler/
H A D	MipsDisassembler.cpp	82 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, 87 static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst, 92 static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, 97 static DecodeStatus DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, 102 static DecodeStatus DecodeGPRMM16MovePRegisterClass(MCInst &Inst, 107 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, 112 static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, 117 static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, 122 static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, 127 static DecodeStatus DecodeFGR32RegisterClass(MCInst &Inst, 411 DecodeUImmWithOffset(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) DecodeUImmWithOffset() argument 1395 DecodeCPU16RegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeCPU16RegsRegisterClass() argument 1402 DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPR64RegisterClass() argument 1414 DecodeGPRMM16RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPRMM16RegisterClass() argument 1425 DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPRMM16ZeroRegisterClass() argument 1436 DecodeGPRMM16MovePRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPRMM16MovePRegisterClass() argument 1447 DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeGPR32RegisterClass() argument 1458 DecodePtrRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodePtrRegisterClass() argument 1468 DecodeDSPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeDSPRRegisterClass() argument 1475 DecodeFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeFGR64RegisterClass() argument 1487 DecodeFGR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeFGR32RegisterClass() argument 1499 DecodeCCRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeCCRRegisterClass() argument 1510 DecodeFCCRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeFCCRegisterClass() argument 1521 DecodeFGRCCRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeFGRCCRegisterClass() argument 1532 DecodeMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMem() argument 1554 DecodeMemEVA(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMemEVA() argument 1575 DecodeLoadByte15(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeLoadByte15() argument 1593 DecodeCacheOp(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeCacheOp() argument 1610 DecodeCacheOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeCacheOpMM() argument 1627 DecodePrefeOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodePrefeOpMM() argument 1644 DecodeCacheeOp_CacheOpR6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeCacheeOp_CacheOpR6() argument 1661 DecodeSyncI(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSyncI() argument 1676 DecodeSyncI_MM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSyncI_MM() argument 1689 DecodeSynciR6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSynciR6() argument 1704 DecodeMSA128Mem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMSA128Mem() argument 1750 DecodeMemMMImm4(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMemMMImm4() argument 1808 DecodeMemMMSPImm5Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMemMMSPImm5Lsl2() argument 1824 DecodeMemMMGPImm7Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMemMMGPImm7Lsl2() argument 1840 DecodeMemMMReglistImm4Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMemMMReglistImm4Lsl2() argument 1865 DecodeMemMMImm9(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMemMMImm9() argument 1886 DecodeMemMMImm12(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMemMMImm12() argument 1921 DecodeMemMMImm16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMemMMImm16() argument 1939 DecodeFMem(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeFMem() argument 1957 DecodeFMemMMR2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeFMemMMR2() argument 1975 DecodeFMem2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeFMem2() argument 1993 DecodeFMem3(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeFMem3() argument 2011 DecodeFMemCop2R6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeFMemCop2R6() argument 2029 DecodeFMemCop2MMR6(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeFMemCop2MMR6() argument 2045 DecodeSpecial3LlSc(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSpecial3LlSc() argument 2067 DecodeHWRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeHWRegsRegisterClass() argument 2078 DecodeAFGR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeAFGR64RegisterClass() argument 2090 DecodeACC64DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeACC64DSPRegisterClass() argument 2102 DecodeHI32DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeHI32DSPRegisterClass() argument 2114 DecodeLO32DSPRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeLO32DSPRegisterClass() argument 2126 DecodeMSA128BRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeMSA128BRegisterClass() argument 2138 DecodeMSA128HRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeMSA128HRegisterClass() argument 2150 DecodeMSA128WRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeMSA128WRegisterClass() argument 2162 DecodeMSA128DRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeMSA128DRegisterClass() argument 2174 DecodeMSACtrlRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeMSACtrlRegisterClass() argument 2186 DecodeCOP0RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeCOP0RegisterClass() argument 2198 DecodeCOP2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeCOP2RegisterClass() argument 2210 DecodeBranchTarget(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) DecodeBranchTarget() argument 2219 DecodeBranchTarget1SImm16(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) DecodeBranchTarget1SImm16() argument 2228 DecodeJumpTarget(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeJumpTarget() argument 2237 DecodeBranchTarget21(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) DecodeBranchTarget21() argument 2247 DecodeBranchTarget21MM(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) DecodeBranchTarget21MM() argument 2257 DecodeBranchTarget26(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) DecodeBranchTarget26() argument 2267 DecodeBranchTarget7MM(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) DecodeBranchTarget7MM() argument 2276 DecodeBranchTarget10MM(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) DecodeBranchTarget10MM() argument 2285 DecodeBranchTargetMM(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) DecodeBranchTargetMM() argument 2294 DecodeBranchTarget26MM(MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) DecodeBranchTarget26MM() argument 2304 DecodeJumpTargetMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeJumpTargetMM() argument 2313 DecodeJumpTargetXMM(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeJumpTargetXMM() argument 2322 DecodeAddiur2Simm7(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) DecodeAddiur2Simm7() argument 2335 DecodeLi16Imm(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) DecodeLi16Imm() argument 2346 DecodePOOL16BEncodedField(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) DecodePOOL16BEncodedField() argument 2355 DecodeUImmWithOffsetAndScale(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) DecodeUImmWithOffsetAndScale() argument 2365 DecodeSImmWithOffsetAndScale(MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) DecodeSImmWithOffsetAndScale() argument 2373 DecodeInsSize(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeInsSize() argument 2386 DecodeSimm19Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSimm19Lsl2() argument 2392 DecodeSimm18Lsl3(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSimm18Lsl3() argument 2398 DecodeSimm9SP(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSimm9SP() argument 2412 DecodeANDI16Imm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeANDI16Imm() argument 2451 DecodeRegListOperand16(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeRegListOperand16() argument 2475 DecodeMovePOperands(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeMovePOperands() argument 2501 DecodeMovePRegPair(MCInst &Inst, unsigned RegPair, uint64_t Address, const void *Decoder) DecodeMovePRegPair() argument 2543 DecodeSimm23Lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeSimm23Lsl2() argument [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/
H A D	AArch64Disassembler.cpp	40 static DecodeStatus DecodeFPR128RegisterClass(MCInst &Inst, 43 static DecodeStatus DecodeFPR128_loRegisterClass(MCInst &Inst, 47 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, unsigned RegNo, 50 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, unsigned RegNo, 53 static DecodeStatus DecodeFPR16RegisterClass(MCInst &Inst, unsigned RegNo, 56 static DecodeStatus DecodeFPR8RegisterClass(MCInst &Inst, unsigned RegNo, 59 static DecodeStatus DecodeGPR64commonRegisterClass(MCInst &Inst, unsigned RegNo, 62 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, 65 static DecodeStatus DecodeGPR64spRegisterClass(MCInst &Inst, 68 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigne 314 DecodeFPR128RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeFPR128RegisterClass() argument 325 DecodeFPR128_loRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeFPR128_loRegisterClass() argument 343 DecodeFPR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeFPR64RegisterClass() argument 364 DecodeFPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeFPR32RegisterClass() argument 385 DecodeFPR16RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeFPR16RegisterClass() argument 406 DecodeFPR8RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeFPR8RegisterClass() argument 427 DecodeGPR64commonRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeGPR64commonRegisterClass() argument 438 DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeGPR64RegisterClass() argument 449 DecodeGPR64spRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeGPR64spRegisterClass() argument 471 DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeGPR32RegisterClass() argument 482 DecodeGPR32spRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeGPR32spRegisterClass() argument 505 DecodeZPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) DecodeZPRRegisterClass() argument 516 DecodeZPR_4bRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeZPR_4bRegisterClass() argument 524 DecodeZPR_3bRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeZPR_3bRegisterClass() argument 543 DecodeZPR2RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) DecodeZPR2RegisterClass() argument 567 DecodeZPR3RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) DecodeZPR3RegisterClass() argument 591 DecodeZPR4RegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void* Decoder) DecodeZPR4RegisterClass() argument 608 DecodePPRRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodePPRRegisterClass() argument 618 DecodePPR_3bRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void* Decoder) DecodePPR_3bRegisterClass() argument 638 DecodeVectorRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeVectorRegisterClass() argument 660 DecodeQQRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeQQRegisterClass() argument 683 DecodeQQQRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeQQQRegisterClass() argument 706 DecodeQQQQRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeQQQQRegisterClass() argument 727 DecodeDDRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeDDRegisterClass() argument 750 DecodeDDDRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeDDDRegisterClass() argument 773 DecodeDDDDRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeDDDDRegisterClass() argument 783 DecodeFixedPointScaleImm32(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeFixedPointScaleImm32() argument 792 DecodeFixedPointScaleImm64(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeFixedPointScaleImm64() argument 799 DecodePCRelLabel19(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodePCRelLabel19() argument 815 DecodeMemExtend(MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder) DecodeMemExtend() argument 822 DecodeMRSSystemRegister(MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder) DecodeMRSSystemRegister() argument 832 DecodeMSRSystemRegister(MCInst &Inst, unsigned Imm, uint64_t Address, const void *Decoder) DecodeMSRSystemRegister() argument 840 DecodeFMOVLaneInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) DecodeFMOVLaneInstruction() argument 863 DecodeVecShiftRImm(MCInst &Inst, unsigned Imm, unsigned Add) DecodeVecShiftRImm() argument 869 DecodeVecShiftLImm(MCInst &Inst, unsigned Imm, unsigned Add) DecodeVecShiftLImm() argument 875 DecodeVecShiftR64Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeVecShiftR64Imm() argument 880 DecodeVecShiftR64ImmNarrow(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeVecShiftR64ImmNarrow() argument 886 DecodeVecShiftR32Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeVecShiftR32Imm() argument 891 DecodeVecShiftR32ImmNarrow(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeVecShiftR32ImmNarrow() argument 897 DecodeVecShiftR16Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeVecShiftR16Imm() argument 902 DecodeVecShiftR16ImmNarrow(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeVecShiftR16ImmNarrow() argument 908 DecodeVecShiftR8Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeVecShiftR8Imm() argument 913 DecodeVecShiftL64Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeVecShiftL64Imm() argument 918 DecodeVecShiftL32Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeVecShiftL32Imm() argument 923 DecodeVecShiftL16Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeVecShiftL16Imm() argument 928 DecodeVecShiftL8Imm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeVecShiftL8Imm() argument 933 DecodeThreeAddrSRegInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeThreeAddrSRegInstruction() argument 995 DecodeMoveImmInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeMoveImmInstruction() argument 1028 DecodeUnsignedLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeUnsignedLdStInstruction() argument 1089 DecodeSignedLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeSignedLdStInstruction() argument 1287 DecodeExclusiveLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeExclusiveLdStInstruction() argument 1370 DecodePairLdStInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodePairLdStInstruction() argument 1504 DecodeAddSubERegInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeAddSubERegInstruction() argument 1561 DecodeLogicalImmInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeLogicalImmInstruction() argument 1592 DecodeModImmInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeModImmInstruction() argument 1631 DecodeModImmTiedInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeModImmTiedInstruction() argument 1649 DecodeAdrInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeAdrInstruction() argument 1668 DecodeAddSubImmShift(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeAddSubImmShift() argument 1704 DecodeUnconditionalBranch(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeUnconditionalBranch() argument 1721 DecodeSystemPStateInstruction(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeSystemPStateInstruction() argument 1751 DecodeTestAndBranch(MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeTestAndBranch() argument 1775 DecodeGPRSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegClassID, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeGPRSeqPairsClassRegisterClass() argument 1789 DecodeWSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeWSeqPairsClassRegisterClass() argument 1798 DecodeXSeqPairsClassRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Addr, const void *Decoder) DecodeXSeqPairsClassRegisterClass() argument 1807 DecodeSVELogicalImmInstruction(llvm::MCInst &Inst, uint32_t insn, uint64_t Addr, const void *Decoder) DecodeSVELogicalImmInstruction() argument 1825 DecodeSImm(llvm::MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) DecodeSImm() argument 1840 DecodeImm8OptLsl(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeImm8OptLsl() argument 1852 DecodeSVEIncDecImm(MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder) DecodeSVEIncDecImm() argument [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/
H A D	EarlyCSE.cpp	97 Instruction *Inst; member 99 SimpleValue(Instruction *I) : Inst(I) { in SimpleValue() 100 assert((isSentinel() || canHandle(I)) && "Inst can't be handled!"); in SimpleValue() 104 return Inst == DenseMapInfo<Instruction *>::getEmptyKey() || in isSentinel() 105 Inst == DenseMapInfo<Instruction *>::getTombstoneKey(); in isSentinel() 108 static bool canHandle(Instruction *Inst) { in canHandle() 110 if (CallInst *CI = dyn_cast<CallInst>(Inst)) in canHandle() 112 return isa<CastInst>(Inst) || isa<UnaryOperator>(Inst) || in canHandle() 113 isa<BinaryOperator>(Inst) || is in canHandle() 204 Instruction *Inst = Val.Inst; getHashValueImpl() local 410 Instruction *Inst; global() member 453 Instruction *Inst = Val.Inst; getHashValue() local 642 ParseMemoryInst(Instruction *Inst, const TargetTransformInfo &TTI) ParseMemoryInst() argument 731 Instruction *Inst; global() member in __anon25107::EarlyCSE::ParseMemoryInst 739 getOrCreateResult(Value *Inst, Type *ExpectedType) const getOrCreateResult() argument 756 removeMSSA(Instruction *Inst) removeMSSA() argument 938 Instruction *Inst = &*I++; processNode() local 1261 << " due to: " << *Inst << '\\n'); processNode() local [all...]
H A D	Sink.cpp	37 static bool AllUsesDominatedByBlock(Instruction *Inst, BasicBlock *BB, in AllUsesDominatedByBlock() argument 43 for (Use &U : Inst->uses()) { in AllUsesDominatedByBlock() 60 static bool isSafeToMove(Instruction *Inst, AliasAnalysis &AA, in isSafeToMove() argument 63 if (Inst->mayWriteToMemory()) { in isSafeToMove() 64 Stores.insert(Inst); in isSafeToMove() 68 if (LoadInst *L = dyn_cast<LoadInst>(Inst)) { in isSafeToMove() 75 if (Inst->isTerminator() || isa<PHINode>(Inst) || Inst->isEHPad() || in isSafeToMove() 76 Inst in isSafeToMove() 95 IsAcceptableTarget(Instruction *Inst, BasicBlock *SuccToSinkTo, DominatorTree &DT, LoopInfo &LI) IsAcceptableTarget() argument 139 SinkInstruction(Instruction *Inst, SmallPtrSetImpl<Instruction *> &Stores, DominatorTree &DT, LoopInfo &LI, AAResults &AA) SinkInstruction() argument 217 Instruction *Inst = &*I; // The instruction to sink. ProcessBlock() local [all...]
H A D	LowerMatrixIntrinsics.cpp	302 Instruction *Inst = dyn_cast<Instruction>(V); in supportsShapeInfo() local 303 if (!Inst) in supportsShapeInfo() 306 IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst); in supportsShapeInfo() 332 Instruction *Inst = WorkList.back(); in propagateShapeForward() local 343 if (match(Inst, m_Intrinsic<Intrinsic::matrix_multiply>( in propagateShapeForward() 346 Propagate = setShapeInfo(Inst, {M, K}); in propagateShapeForward() 347 } else if (match(Inst, m_Intrinsic<Intrinsic::matrix_transpose>( in propagateShapeForward() 350 Propagate = setShapeInfo(Inst, {N, M}); in propagateShapeForward() 351 } else if (match(Inst, m_Intrinsic<Intrinsic::matrix_columnwise_store>( in propagateShapeForward() 354 Propagate = setShapeInfo(Inst, { in propagateShapeForward() 537 VisitCallInst(CallInst *Inst) VisitCallInst() argument 560 LowerLoad(Instruction *Inst, Value *Ptr, Value *Stride, ShapeInfo Shape) LowerLoad() argument 581 LowerColumnwiseLoad(CallInst *Inst) LowerColumnwiseLoad() argument 588 LowerStore(Instruction *Inst, Value *Matrix, Value *Ptr, Value *Stride, ShapeInfo Shape) LowerStore() argument 607 LowerColumnwiseStore(CallInst *Inst) LowerColumnwiseStore() argument 686 finalizeLowering(Instruction *Inst, ColumnMatrixTy Matrix, IRBuilder<> &Builder) finalizeLowering() argument 755 LowerTranspose(CallInst *Inst) LowerTranspose() argument 784 VisitLoad(Instruction *Inst, Value *Ptr, IRBuilder<> &Builder) VisitLoad() argument 793 VisitStore(Instruction *Inst, Value *StoredVal, Value *Ptr, IRBuilder<> &Builder) VisitStore() argument 804 VisitBinaryOperator(BinaryOperator *Inst) VisitBinaryOperator() argument [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/Disassembler/
H A D	PPCDisassembler.cpp	63 static DecodeStatus DecodePCRel24BranchTarget(MCInst &Inst, unsigned Imm, in DecodePCRel24BranchTarget() argument 67 Inst.addOperand(MCOperand::createImm(Offset)); in DecodePCRel24BranchTarget() 75 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass() argument 78 Inst.addOperand(MCOperand::createReg(Regs[RegNo])); in decodeRegisterClass() 82 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, 85 return decodeRegisterClass(Inst, RegNo, CRRegs); 88 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, 91 return decodeRegisterClass(Inst, RegNo, CRBITRegs); 94 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, 97 return decodeRegisterClass(Inst, RegN [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Disassembler/
H A D	RISCVDisassembler.cpp	59 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGPRRegisterClass() argument 72 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPRRegisterClass() 76 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32RegisterClass() argument 83 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32RegisterClass() 87 static DecodeStatus DecodeFPR32CRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR32CRegisterClass() argument 94 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR32CRegisterClass() 98 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR64RegisterClass() argument 105 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPR64RegisterClass() 109 static DecodeStatus DecodeFPR64CRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFPR64CRegisterClass() argument 116 Inst in DecodeFPR64CRegisterClass() 120 DecodeGPRNoX0RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) DecodeGPRNoX0RegisterClass() argument 130 DecodeGPRNoX0X2RegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) DecodeGPRNoX0X2RegisterClass() argument 140 DecodeGPRCRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) DecodeGPRCRegisterClass() argument 153 addImplySP(MCInst &Inst, int64_t Address, const void *Decoder) addImplySP() argument 170 decodeUImmOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) decodeUImmOperand() argument 179 decodeUImmNonZeroOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) decodeUImmNonZeroOperand() argument 188 decodeSImmOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) decodeSImmOperand() argument 198 decodeSImmNonZeroOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) decodeSImmNonZeroOperand() argument 207 decodeSImmOperandAndLsl1(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) decodeSImmOperandAndLsl1() argument 218 decodeCLUIImmOperand(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) decodeCLUIImmOperand() argument 229 decodeFRMArg(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) decodeFRMArg() argument 259 decodeRVCInstrSImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) decodeRVCInstrSImm() argument 269 decodeRVCInstrRdSImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) decodeRVCInstrRdSImm() argument 281 decodeRVCInstrRdRs1UImm(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) decodeRVCInstrRdRs1UImm() argument 294 decodeRVCInstrRdRs2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) decodeRVCInstrRdRs2() argument 303 decodeRVCInstrRdRs1Rs2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) decodeRVCInstrRdRs1Rs2() argument [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/AsmParser/
H A D	PPCAsmParser.cpp	133 void ProcessInstruction(MCInst &Inst, const OperandVector &Ops); 409 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() 413 void addRegGPRCOperands(MCInst &Inst, unsigned N) const { in addRegGPRCOperands() 415 Inst.addOperand(MCOperand::createReg(RRegs[getReg()])); in addRegGPRCOperands() 418 void addRegGPRCNoR0Operands(MCInst &Inst, unsigned N) const { in addRegGPRCNoR0Operands() 420 Inst.addOperand(MCOperand::createReg(RRegsNoR0[getReg()])); in addRegGPRCNoR0Operands() 423 void addRegG8RCOperands(MCInst &Inst, unsigned N) const { in addRegG8RCOperands() 425 Inst.addOperand(MCOperand::createReg(XRegs[getReg()])); in addRegG8RCOperands() 428 void addRegG8RCNoX0Operands(MCInst &Inst, unsigned N) const { in addRegG8RCNoX0Operands() 430 Inst in addRegG8RCNoX0Operands() 690 addNegOperand(MCInst &Inst, MCOperand &Op, MCContext &Ctx) addNegOperand() argument 712 ProcessInstruction(MCInst &Inst, const OperandVector &Operands) ProcessInstruction() argument 1138 MCInst Inst; MatchAndEmitInstruction() local [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/
H A D	CFLGraph.h	263 void visitReturnInst(ReturnInst &Inst) { 264 if (auto RetVal = Inst.getReturnValue()) { 272 void visitPtrToIntInst(PtrToIntInst &Inst) { 273 auto *Ptr = Inst.getOperand(0); 277 void visitIntToPtrInst(IntToPtrInst &Inst) { 278 auto *Ptr = &Inst; 282 void visitCastInst(CastInst &Inst) { 283 auto *Src = Inst.getOperand(0); 284 addAssignEdge(Src, &Inst); 287 void visitBinaryOperator(BinaryOperator &Inst) { [all...]
H A D	PHITransAddr.cpp	25 static bool CanPHITrans(Instruction *Inst) { in CanPHITrans() argument 26 if (isa<PHINode>(Inst) || in CanPHITrans() 27 isa<GetElementPtrInst>(Inst)) in CanPHITrans() 30 if (isa<CastInst>(Inst) && in CanPHITrans() 31 isSafeToSpeculativelyExecute(Inst)) in CanPHITrans() 34 if (Inst->getOpcode() == Instruction::Add && in CanPHITrans() 35 isa<ConstantInt>(Inst->getOperand(1))) in CanPHITrans() 117 Instruction *Inst = dyn_cast<Instruction>(Addr); in IsPotentiallyPHITranslatable() local 118 return !Inst || CanPHITrans(Inst); in IsPotentiallyPHITranslatable() 147 Instruction *Inst = dyn_cast<Instruction>(V); PHITranslateSubExpr() local [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/
H A D	ARMAsmParser.cpp	252 for (const MCInst &Inst : PendingConditionalInsts) { 253 Out.EmitInstruction(Inst, getSTI()); 389 bool validatetLDMRegList(const MCInst &Inst, const OperandVector &Operands, 391 bool validatetSTMRegList(const MCInst &Inst, const OperandVector &Operands, 579 void cvtThumbMultiply(MCInst &Inst, const OperandVector &); 580 void cvtThumbBranches(MCInst &Inst, const OperandVector &); 581 void cvtMVEVMOVQtoDReg(MCInst &Inst, const OperandVector &); 583 bool validateInstruction(MCInst &Inst, const OperandVector &Ops); 584 bool processInstruction(MCInst &Inst, const OperandVector &Ops, MCStreamer &Out); 588 bool isITBlockTerminator(MCInst &Inst) cons 2322 addExpr(MCInst &Inst, const MCExpr *Expr) const addExpr() argument 2332 addARMBranchTargetOperands(MCInst &Inst, unsigned N) const addARMBranchTargetOperands() argument 2337 addThumbBranchTargetOperands(MCInst &Inst, unsigned N) const addThumbBranchTargetOperands() argument 2342 addCondCodeOperands(MCInst &Inst, unsigned N) const addCondCodeOperands() argument 2349 addVPTPredNOperands(MCInst &Inst, unsigned N) const addVPTPredNOperands() argument 2356 addVPTPredROperands(MCInst &Inst, unsigned N) const addVPTPredROperands() argument 2373 addCoprocNumOperands(MCInst &Inst, unsigned N) const addCoprocNumOperands() argument 2378 addCoprocRegOperands(MCInst &Inst, unsigned N) const addCoprocRegOperands() argument 2383 addCoprocOptionOperands(MCInst &Inst, unsigned N) const addCoprocOptionOperands() argument 2388 addITMaskOperands(MCInst &Inst, unsigned N) const addITMaskOperands() argument 2393 addITCondCodeOperands(MCInst &Inst, unsigned N) const addITCondCodeOperands() argument 2398 addITCondCodeInvOperands(MCInst &Inst, unsigned N) const addITCondCodeInvOperands() argument 2403 addCCOutOperands(MCInst &Inst, unsigned N) const addCCOutOperands() argument 2408 addRegOperands(MCInst &Inst, unsigned N) const addRegOperands() argument 2413 addRegShiftedRegOperands(MCInst &Inst, unsigned N) const addRegShiftedRegOperands() argument 2423 addRegShiftedImmOperands(MCInst &Inst, unsigned N) const addRegShiftedImmOperands() argument 2434 addShifterImmOperands(MCInst &Inst, unsigned N) const addShifterImmOperands() argument 2440 addRegListOperands(MCInst &Inst, unsigned N) const addRegListOperands() argument 2448 addRegListWithAPSROperands(MCInst &Inst, unsigned N) const addRegListWithAPSROperands() argument 2456 addDPRRegListOperands(MCInst &Inst, unsigned N) const addDPRRegListOperands() argument 2460 addSPRRegListOperands(MCInst &Inst, unsigned N) const addSPRRegListOperands() argument 2464 addFPSRegListWithVPROperands(MCInst &Inst, unsigned N) const addFPSRegListWithVPROperands() argument 2468 addFPDRegListWithVPROperands(MCInst &Inst, unsigned N) const addFPDRegListWithVPROperands() argument 2472 addRotImmOperands(MCInst &Inst, unsigned N) const addRotImmOperands() argument 2478 addModImmOperands(MCInst &Inst, unsigned N) const addModImmOperands() argument 2488 addModImmNotOperands(MCInst &Inst, unsigned N) const addModImmNotOperands() argument 2495 addModImmNegOperands(MCInst &Inst, unsigned N) const addModImmNegOperands() argument 2502 addThumbModImmNeg8_255Operands(MCInst &Inst, unsigned N) const addThumbModImmNeg8_255Operands() argument 2509 addThumbModImmNeg1_7Operands(MCInst &Inst, unsigned N) const addThumbModImmNeg1_7Operands() argument 2516 addBitfieldOperands(MCInst &Inst, unsigned N) const addBitfieldOperands() argument 2527 addImmOperands(MCInst &Inst, unsigned N) const addImmOperands() argument 2532 addFBits16Operands(MCInst &Inst, unsigned N) const addFBits16Operands() argument 2538 addFBits32Operands(MCInst &Inst, unsigned N) const addFBits32Operands() argument 2544 addFPImmOperands(MCInst &Inst, unsigned N) const addFPImmOperands() argument 2551 addImm8s4Operands(MCInst &Inst, unsigned N) const addImm8s4Operands() argument 2559 addImm7s4Operands(MCInst &Inst, unsigned N) const addImm7s4Operands() argument 2567 addImm7Shift0Operands(MCInst &Inst, unsigned N) const addImm7Shift0Operands() argument 2573 addImm7Shift1Operands(MCInst &Inst, unsigned N) const addImm7Shift1Operands() argument 2579 addImm7Shift2Operands(MCInst &Inst, unsigned N) const addImm7Shift2Operands() argument 2585 addImm7Operands(MCInst &Inst, unsigned N) const addImm7Operands() argument 2591 addImm0_1020s4Operands(MCInst &Inst, unsigned N) const addImm0_1020s4Operands() argument 2599 addImm0_508s4NegOperands(MCInst &Inst, unsigned N) const addImm0_508s4NegOperands() argument 2607 addImm0_508s4Operands(MCInst &Inst, unsigned N) const addImm0_508s4Operands() argument 2615 addImm1_16Operands(MCInst &Inst, unsigned N) const addImm1_16Operands() argument 2623 addImm1_32Operands(MCInst &Inst, unsigned N) const addImm1_32Operands() argument 2631 addImmThumbSROperands(MCInst &Inst, unsigned N) const addImmThumbSROperands() argument 2640 addPKHASRImmOperands(MCInst &Inst, unsigned N) const addPKHASRImmOperands() argument 2649 addT2SOImmNotOperands(MCInst &Inst, unsigned N) const addT2SOImmNotOperands() argument 2657 addT2SOImmNegOperands(MCInst &Inst, unsigned N) const addT2SOImmNegOperands() argument 2665 addImm0_4095NegOperands(MCInst &Inst, unsigned N) const addImm0_4095NegOperands() argument 2673 addUnsignedOffset_b8s2Operands(MCInst &Inst, unsigned N) const addUnsignedOffset_b8s2Operands() argument 2682 addThumbMemPCOperands(MCInst &Inst, unsigned N) const addThumbMemPCOperands() argument 2700 addMemBarrierOptOperands(MCInst &Inst, unsigned N) const addMemBarrierOptOperands() argument 2705 addInstSyncBarrierOptOperands(MCInst &Inst, unsigned N) const addInstSyncBarrierOptOperands() argument 2710 addTraceSyncBarrierOptOperands(MCInst &Inst, unsigned N) const addTraceSyncBarrierOptOperands() argument 2715 addMemNoOffsetOperands(MCInst &Inst, unsigned N) const addMemNoOffsetOperands() argument 2720 addMemNoOffsetT2Operands(MCInst &Inst, unsigned N) const addMemNoOffsetT2Operands() argument 2725 addMemNoOffsetT2NoSpOperands(MCInst &Inst, unsigned N) const addMemNoOffsetT2NoSpOperands() argument 2730 addMemNoOffsetTOperands(MCInst &Inst, unsigned N) const addMemNoOffsetTOperands() argument 2735 addMemPCRelImm12Operands(MCInst &Inst, unsigned N) const addMemPCRelImm12Operands() argument 2741 addAdrLabelOperands(MCInst &Inst, unsigned N) const addAdrLabelOperands() argument 2757 addAlignedMemoryOperands(MCInst &Inst, unsigned N) const addAlignedMemoryOperands() argument 2763 addDupAlignedMemoryNoneOperands(MCInst &Inst, unsigned N) const addDupAlignedMemoryNoneOperands() argument 2767 addAlignedMemoryNoneOperands(MCInst &Inst, unsigned N) const addAlignedMemoryNoneOperands() argument 2771 addAlignedMemory16Operands(MCInst &Inst, unsigned N) const addAlignedMemory16Operands() argument 2775 addDupAlignedMemory16Operands(MCInst &Inst, unsigned N) const addDupAlignedMemory16Operands() argument 2779 addAlignedMemory32Operands(MCInst &Inst, unsigned N) const addAlignedMemory32Operands() argument 2783 addDupAlignedMemory32Operands(MCInst &Inst, unsigned N) const addDupAlignedMemory32Operands() argument 2787 addAlignedMemory64Operands(MCInst &Inst, unsigned N) const addAlignedMemory64Operands() argument 2791 addDupAlignedMemory64Operands(MCInst &Inst, unsigned N) const addDupAlignedMemory64Operands() argument 2795 addAlignedMemory64or128Operands(MCInst &Inst, unsigned N) const addAlignedMemory64or128Operands() argument 2799 addDupAlignedMemory64or128Operands(MCInst &Inst, unsigned N) const addDupAlignedMemory64or128Operands() argument 2803 addAlignedMemory64or128or256Operands(MCInst &Inst, unsigned N) const addAlignedMemory64or128or256Operands() argument 2807 addAddrMode2Operands(MCInst &Inst, unsigned N) const addAddrMode2Operands() argument 3069 addMemThumbRIs2Operands(MCInst &Inst, unsigned N) const addMemThumbRIs2Operands() argument 3076 addMemThumbRIs1Operands(MCInst &Inst, unsigned N) const addMemThumbRIs1Operands() argument 3083 addMemThumbSPIOperands(MCInst &Inst, unsigned N) const addMemThumbSPIOperands() argument 3090 addPostIdxImm8Operands(MCInst &Inst, unsigned N) const addPostIdxImm8Operands() argument 3101 addPostIdxImm8s4Operands(MCInst &Inst, unsigned N) const addPostIdxImm8s4Operands() argument 3113 addPostIdxRegOperands(MCInst &Inst, unsigned N) const addPostIdxRegOperands() argument 3119 addPostIdxRegShiftedOperands(MCInst &Inst, unsigned N) const addPostIdxRegShiftedOperands() argument 3130 addPowerTwoOperands(MCInst &Inst, unsigned N) const addPowerTwoOperands() argument 3136 addMSRMaskOperands(MCInst &Inst, unsigned N) const addMSRMaskOperands() argument 3141 addBankedRegOperands(MCInst &Inst, unsigned N) const addBankedRegOperands() argument 3146 addProcIFlagsOperands(MCInst &Inst, unsigned N) const addProcIFlagsOperands() argument 3151 addVecListOperands(MCInst &Inst, unsigned N) const addVecListOperands() argument 3156 addMVEVecListOperands(MCInst &Inst, unsigned N) const addMVEVecListOperands() argument 3187 addVecListIndexedOperands(MCInst &Inst, unsigned N) const addVecListIndexedOperands() argument 3193 addVectorIndex8Operands(MCInst &Inst, unsigned N) const addVectorIndex8Operands() argument 3198 addVectorIndex16Operands(MCInst &Inst, unsigned N) const addVectorIndex16Operands() argument 3203 addVectorIndex32Operands(MCInst &Inst, unsigned N) const addVectorIndex32Operands() argument 3208 addVectorIndex64Operands(MCInst &Inst, unsigned N) const addVectorIndex64Operands() argument 3213 addMVEVectorIndexOperands(MCInst &Inst, unsigned N) const addMVEVectorIndexOperands() argument 3218 addMVEPairVectorIndexOperands(MCInst &Inst, unsigned N) const addMVEPairVectorIndexOperands() argument 3223 addNEONi8splatOperands(MCInst &Inst, unsigned N) const addNEONi8splatOperands() argument 3231 addNEONi16splatOperands(MCInst &Inst, unsigned N) const addNEONi16splatOperands() argument 3240 addNEONi16splatNotOperands(MCInst &Inst, unsigned N) const addNEONi16splatNotOperands() argument 3249 addNEONi32splatOperands(MCInst &Inst, unsigned N) const addNEONi32splatOperands() argument 3258 addNEONi32splatNotOperands(MCInst &Inst, unsigned N) const addNEONi32splatNotOperands() argument 3267 addNEONi8ReplicateOperands(MCInst &Inst, bool Inv) const addNEONi8ReplicateOperands() argument 3282 addNEONinvi8ReplicateOperands(MCInst &Inst, unsigned N) const addNEONinvi8ReplicateOperands() argument 3297 addNEONi32vmovOperands(MCInst &Inst, unsigned N) const addNEONi32vmovOperands() argument 3305 addNEONvmovi8ReplicateOperands(MCInst &Inst, unsigned N) const addNEONvmovi8ReplicateOperands() argument 3310 addNEONvmovi16ReplicateOperands(MCInst &Inst, unsigned N) const addNEONvmovi16ReplicateOperands() argument 3326 addNEONi32vmovNegOperands(MCInst &Inst, unsigned N) const addNEONi32vmovNegOperands() argument 3334 addNEONvmovi32ReplicateOperands(MCInst &Inst, unsigned N) const addNEONvmovi32ReplicateOperands() argument 3348 addNEONi64splatOperands(MCInst &Inst, unsigned N) const addNEONi64splatOperands() argument 3360 addComplexRotationEvenOperands(MCInst &Inst, unsigned N) const addComplexRotationEvenOperands() argument 3366 addComplexRotationOddOperands(MCInst &Inst, unsigned N) const addComplexRotationOddOperands() argument 3372 addMveSaturateOperands(MCInst &Inst, unsigned N) const addMveSaturateOperands() argument 5551 cvtThumbMultiply(MCInst &Inst, const OperandVector &Operands) cvtThumbMultiply() argument 5567 cvtThumbBranches(MCInst &Inst, const OperandVector &Operands) cvtThumbBranches() argument 5625 cvtMVEVMOVQtoDReg( MCInst &Inst, const OperandVector &Operands) cvtMVEVMOVQtoDReg() argument 7176 checkLowRegisterList(const MCInst &Inst, unsigned OpNo, unsigned Reg, unsigned HiReg, bool &containsReg) checkLowRegisterList() argument 7193 listContainsReg(const MCInst &Inst, unsigned OpNo, unsigned Reg) listContainsReg() argument 7204 instIsBreakpoint(const MCInst &Inst) instIsBreakpoint() argument 7211 validatetLDMRegList(const MCInst &Inst, const OperandVector &Operands, unsigned ListNo, bool IsARPop) validatetLDMRegList() argument 7230 validatetSTMRegList(const MCInst &Inst, const OperandVector &Operands, unsigned ListNo) validatetSTMRegList() argument 7251 validateLDRDSTRD(MCInst &Inst, const OperandVector &Operands, bool Load, bool ARMMode, bool Writeback) validateLDRDSTRD() argument 7322 validateInstruction(MCInst &Inst, const OperandVector &Operands) validateInstruction() argument 8211 processInstruction(MCInst &Inst, const OperandVector &Operands, MCStreamer &Out) processInstruction() argument 10234 checkTargetMatchPredicate(MCInst &Inst) checkTargetMatchPredicate() argument 10371 MatchInstruction(OperandVector &Operands, MCInst &Inst, SmallVectorImpl<NearMissInfo> &NearMisses, bool MatchingInlineAsm, bool &EmitInITBlock, MCStreamer &Out) MatchInstruction() argument 10464 MCInst Inst; MatchAndEmitInstruction() local [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/
H A D	LanaiMCCodeEmitter.cpp	51 uint64_t getBinaryCodeForInstr(const MCInst &Inst, 57 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp, 61 unsigned getRiMemoryOpValue(const MCInst &Inst, unsigned OpNo, 65 unsigned getRrMemoryOpValue(const MCInst &Inst, unsigned OpNo, 69 unsigned getSplsOpValue(const MCInst &Inst, unsigned OpNo, 73 unsigned getBranchTargetOpValue(const MCInst &Inst, unsigned OpNo, 77 void encodeInstruction(const MCInst &Inst, raw_ostream &Ostream, 81 unsigned adjustPqBitsRmAndRrm(const MCInst &Inst, unsigned Value, 84 unsigned adjustPqBitsSpls(const MCInst &Inst, unsigned Value, 110 const MCInst &Inst, cons in getMachineOpValue() 109 getMachineOpValue( const MCInst &Inst, const MCOperand &MCOp, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &SubtargetInfo) const getMachineOpValue() argument 135 adjustPqBits(const MCInst &Inst, unsigned Value, unsigned PBitShift, unsigned QBitShift) adjustPqBits() argument 161 adjustPqBitsRmAndRrm(const MCInst &Inst, unsigned Value, const MCSubtargetInfo &STI) const adjustPqBitsRmAndRrm() argument 167 adjustPqBitsSpls(const MCInst &Inst, unsigned Value, const MCSubtargetInfo &STI) const adjustPqBitsSpls() argument 172 encodeInstruction( const MCInst &Inst, raw_ostream &Ostream, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &SubtargetInfo) const encodeInstruction() argument 185 getRiMemoryOpValue( const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &SubtargetInfo) const getRiMemoryOpValue() argument 217 getRrMemoryOpValue( const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &SubtargetInfo) const getRrMemoryOpValue() argument 256 getSplsOpValue(const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &SubtargetInfo) const getSplsOpValue() argument 288 getBranchTargetOpValue( const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &SubtargetInfo) const getBranchTargetOpValue() argument [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/
H A D	HexagonMCDuplexInfo.cpp	663 inline static void addOps(MCInst &subInstPtr, MCInst const &Inst, in addOps() argument 665 if (Inst.getOperand(opNum).isReg()) { in addOps() 666 switch (Inst.getOperand(opNum).getReg()) { in addOps() 695 subInstPtr.addOperand(Inst.getOperand(opNum)); in addOps() 699 subInstPtr.addOperand(Inst.getOperand(opNum)); in addOps() 702 MCInst HexagonMCInstrInfo::deriveSubInst(MCInst const &Inst) { in deriveSubInst() argument 706 switch (Inst.getOpcode()) { in deriveSubInst() 708 // dbgs() << "opcode: "<< Inst->getOpcode() << "\n"; in deriveSubInst() 712 Absolute = Inst.getOperand(2).getExpr()->evaluateAsAbsolute(Value); in deriveSubInst() 716 addOps(Result, Inst, in deriveSubInst() [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
H A D	MCInstrAnalysis.h	37 virtual bool isBranch(const MCInst &Inst) const { in isBranch() 38 return Info->get(Inst.getOpcode()).isBranch(); in isBranch() 41 virtual bool isConditionalBranch(const MCInst &Inst) const { in isConditionalBranch() 42 return Info->get(Inst.getOpcode()).isConditionalBranch(); in isConditionalBranch() 45 virtual bool isUnconditionalBranch(const MCInst &Inst) const { in isUnconditionalBranch() 46 return Info->get(Inst.getOpcode()).isUnconditionalBranch(); in isUnconditionalBranch() 49 virtual bool isIndirectBranch(const MCInst &Inst) const { in isIndirectBranch() 50 return Info->get(Inst.getOpcode()).isIndirectBranch(); in isIndirectBranch() 53 virtual bool isCall(const MCInst &Inst) const { in isCall() 54 return Info->get(Inst in isCall() [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/ObjCARC/
H A D	DependencyAnalysis.cpp	34 bool llvm::objcarc::CanAlterRefCount(const Instruction *Inst, const Value *Ptr, in CanAlterRefCount() argument 47 const auto *Call = cast<CallBase>(Inst); in CanAlterRefCount() 54 const DataLayout &DL = Inst->getModule()->getDataLayout(); in CanAlterRefCount() 67 bool llvm::objcarc::CanDecrementRefCount(const Instruction *Inst, in CanDecrementRefCount() argument 76 return CanAlterRefCount(Inst, Ptr, PA, Class); in CanDecrementRefCount() 81 bool llvm::objcarc::CanUse(const Instruction *Inst, const Value *Ptr, in CanUse() argument 88 const DataLayout &DL = Inst->getModule()->getDataLayout(); in CanUse() 92 if (const ICmpInst *ICI = dyn_cast<ICmpInst>(Inst)) { in CanUse() 98 } else if (auto CS = ImmutableCallSite(Inst)) { in CanUse() 108 } else if (const StoreInst *SI = dyn_cast<StoreInst>(Inst)) { in CanUse() 131 Depends(DependenceKind Flavor, Instruction *Inst, const Value *Arg, ProvenanceAnalysis &PA) Depends() argument 251 Instruction *Inst = &*--LocalStartPos; FindDependencies() local [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
H A D	X86InstComments.cpp	25 #define CASE_SSE_INS_COMMON(Inst, src) \ 26 case X86::Inst##src: 28 #define CASE_AVX_INS_COMMON(Inst, Suffix, src) \ 29 case X86::V##Inst##Suffix##src: 31 #define CASE_MASK_INS_COMMON(Inst, Suffix, src) \ 32 case X86::V##Inst##Suffix##src##k: 34 #define CASE_MASKZ_INS_COMMON(Inst, Suffix, src) \ 35 case X86::V##Inst##Suffix##src##kz: 37 #define CASE_AVX512_INS_COMMON(Inst, Suffix, src) \ 38 CASE_AVX_INS_COMMON(Inst, Suffi [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/Disassembler/
H A D	SparcDisassembler.cpp	145 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, in DecodeIntRegsRegisterClass() argument 152 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeIntRegsRegisterClass() 156 static DecodeStatus DecodeI64RegsRegisterClass(MCInst &Inst, in DecodeI64RegsRegisterClass() argument 163 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeI64RegsRegisterClass() 168 static DecodeStatus DecodeFPRegsRegisterClass(MCInst &Inst, in DecodeFPRegsRegisterClass() argument 175 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeFPRegsRegisterClass() 180 static DecodeStatus DecodeDFPRegsRegisterClass(MCInst &Inst, in DecodeDFPRegsRegisterClass() argument 187 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeDFPRegsRegisterClass() 192 static DecodeStatus DecodeQFPRegsRegisterClass(MCInst &Inst, in DecodeQFPRegsRegisterClass() argument 202 Inst in DecodeQFPRegsRegisterClass() 206 DecodeCPRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeCPRegsRegisterClass() argument 217 DecodeFCCRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeFCCRegsRegisterClass() argument 226 DecodeASRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeASRRegsRegisterClass() argument 235 DecodePRRegsRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodePRRegsRegisterClass() argument 244 DecodeIntPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeIntPairRegisterClass() argument 259 DecodeCPPairRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) DecodeCPPairRegisterClass() argument 417 DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeLoadInt() argument 423 DecodeLoadIntPair(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeLoadIntPair() argument 429 DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeLoadFP() argument 435 DecodeLoadDFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeLoadDFP() argument 441 DecodeLoadQFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeLoadQFP() argument 447 DecodeLoadCP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeLoadCP() argument 453 DecodeLoadCPPair(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeLoadCPPair() argument 459 DecodeStoreInt(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeStoreInt() argument 465 DecodeStoreIntPair(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeStoreIntPair() argument 471 DecodeStoreFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeStoreFP() argument 477 DecodeStoreDFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeStoreDFP() argument 483 DecodeStoreQFP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeStoreQFP() argument 489 DecodeStoreCP(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeStoreCP() argument 495 DecodeStoreCPPair(MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder) DecodeStoreCPPair() argument [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
H A D	IceInstrumentation.cpp	61 Inst *Instr = iteratorToInst(Context.getCur()); in instrumentInst() 63 case Inst::Alloca: in instrumentInst() 66 case Inst::Arithmetic: in instrumentInst() 69 case Inst::Br: in instrumentInst() 72 case Inst::Call: in instrumentInst() 75 case Inst::Cast: in instrumentInst() 78 case Inst::ExtractElement: in instrumentInst() 81 case Inst::Fcmp: in instrumentInst() 84 case Inst::Icmp: in instrumentInst() 87 case Inst in instrumentInst() [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A D	SIInsertWaitcnts.cpp	455 void updateEventWaitcntAfter(MachineInstr &Inst, 523 WaitEventType E, MachineInstr &Inst) { in updateByEvent() 542 if (TII->isDS(Inst) && (Inst.mayStore() || Inst.mayLoad())) { in updateByEvent() 544 AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::addr); in updateByEvent() 548 setExpScore(&Inst, TII, TRI, MRI, AddrOpIdx, CurrScore); in updateByEvent() 551 if (Inst.mayStore()) { in updateByEvent() 552 if (AMDGPU::getNamedOperandIdx(Inst.getOpcode(), in updateByEvent() 555 &Inst, TI in updateByEvent() 520 updateByEvent(const SIInstrInfo *TII, const SIRegisterInfo *TRI, const MachineRegisterInfo *MRI, WaitEventType E, MachineInstr &Inst) updateByEvent() argument 1212 updateEventWaitcntAfter(MachineInstr &Inst, WaitcntBrackets *ScoreBrackets) updateEventWaitcntAfter() argument 1392 MachineInstr &Inst = *Iter; insertWaitcntInBlock() local [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/Disassembler/
H A D	ARCDisassembler.cpp	86 static DecodeStatus DecodeSignedOperand(MCInst &Inst, unsigned InsnS, 91 static DecodeStatus DecodeFromCyclicRange(MCInst &Inst, unsigned InsnS, 96 static DecodeStatus DecodeBranchTargetS(MCInst &Inst, unsigned InsnS, 110 static DecodeStatus DecodeMoveHRegInstruction(MCInst &Inst, uint64_t, uint64_t, 120 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo, in DecodeGPR32RegisterClass() argument 129 Inst.addOperand(MCOperand::createReg(Reg)); in DecodeGPR32RegisterClass() 133 static DecodeStatus DecodeGBR32ShortRegister(MCInst &Inst, unsigned RegNo, in DecodeGBR32ShortRegister() argument 140 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder); in DecodeGBR32ShortRegister() 158 static DecodeStatus DecodeMEMrs9(MCInst &Inst, unsigned Insn, uint64_t Address, in DecodeMEMrs9() argument 163 DecodeGPR32RegisterClass(Inst, in DecodeMEMrs9() 168 DecodeSymbolicOperand(MCInst &Inst, uint64_t Address, uint64_t Value, const void *Decoder) DecodeSymbolicOperand() argument 178 DecodeSymbolicOperandOff(MCInst &Inst, uint64_t Address, uint64_t Offset, const void *Decoder) DecodeSymbolicOperandOff() argument 187 DecodeBranchTargetS(MCInst &Inst, unsigned InsnS, uint64_t Address, const void *Decoder) DecodeBranchTargetS() argument 196 DecodeSignedOperand(MCInst &Inst, unsigned InsnS, uint64_t , const void * ) DecodeSignedOperand() argument 207 DecodeFromCyclicRange(MCInst &Inst, unsigned InsnS, uint64_t , const void * ) DecodeFromCyclicRange() argument [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/
H A D	MipsAsmParser.cpp	165 void ConvertXWPOperands(MCInst &Inst, const OperandVector &Operands); 171 checkEarlyTargetMatchPredicate(MCInst &Inst, 173 unsigned checkTargetMatchPredicate(MCInst &Inst) override; 220 MacroExpanderResultTy tryExpandInstruction(MCInst &Inst, SMLoc IDLoc, 224 bool expandJalWithRegs(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, 237 bool expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc, 240 bool expandLoadSingleImmToGPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, 242 bool expandLoadSingleImmToFPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, 244 bool expandLoadDoubleImmToGPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, 246 bool expandLoadDoubleImmToFPR(MCInst &Inst, boo 1032 addExpr(MCInst &Inst, const MCExpr *Expr) const addExpr() argument 1042 addRegOperands(MCInst &Inst, unsigned N) const addRegOperands() argument 1049 addGPR32ZeroAsmRegOperands(MCInst &Inst, unsigned N) const addGPR32ZeroAsmRegOperands() argument 1054 addGPR32NonZeroAsmRegOperands(MCInst &Inst, unsigned N) const addGPR32NonZeroAsmRegOperands() argument 1059 addGPR32AsmRegOperands(MCInst &Inst, unsigned N) const addGPR32AsmRegOperands() argument 1064 addGPRMM16AsmRegOperands(MCInst &Inst, unsigned N) const addGPRMM16AsmRegOperands() argument 1069 addGPRMM16AsmRegZeroOperands(MCInst &Inst, unsigned N) const addGPRMM16AsmRegZeroOperands() argument 1074 addGPRMM16AsmRegMovePOperands(MCInst &Inst, unsigned N) const addGPRMM16AsmRegMovePOperands() argument 1079 addGPRMM16AsmRegMovePPairFirstOperands(MCInst &Inst, unsigned N) const addGPRMM16AsmRegMovePPairFirstOperands() argument 1084 addGPRMM16AsmRegMovePPairSecondOperands(MCInst &Inst, unsigned N) const addGPRMM16AsmRegMovePPairSecondOperands() argument 1093 addGPR64AsmRegOperands(MCInst &Inst, unsigned N) const addGPR64AsmRegOperands() argument 1098 addAFGR64AsmRegOperands(MCInst &Inst, unsigned N) const addAFGR64AsmRegOperands() argument 1103 addStrictlyAFGR64AsmRegOperands(MCInst &Inst, unsigned N) const addStrictlyAFGR64AsmRegOperands() argument 1108 addStrictlyFGR64AsmRegOperands(MCInst &Inst, unsigned N) const addStrictlyFGR64AsmRegOperands() argument 1113 addFGR64AsmRegOperands(MCInst &Inst, unsigned N) const addFGR64AsmRegOperands() argument 1118 addFGR32AsmRegOperands(MCInst &Inst, unsigned N) const addFGR32AsmRegOperands() argument 1129 addStrictlyFGR32AsmRegOperands(MCInst &Inst, unsigned N) const addStrictlyFGR32AsmRegOperands() argument 1138 addFCCAsmRegOperands(MCInst &Inst, unsigned N) const addFCCAsmRegOperands() argument 1143 addMSA128AsmRegOperands(MCInst &Inst, unsigned N) const addMSA128AsmRegOperands() argument 1148 addMSACtrlAsmRegOperands(MCInst &Inst, unsigned N) const addMSACtrlAsmRegOperands() argument 1153 addCOP0AsmRegOperands(MCInst &Inst, unsigned N) const addCOP0AsmRegOperands() argument 1158 addCOP2AsmRegOperands(MCInst &Inst, unsigned N) const addCOP2AsmRegOperands() argument 1163 addCOP3AsmRegOperands(MCInst &Inst, unsigned N) const addCOP3AsmRegOperands() argument 1168 addACC64DSPAsmRegOperands(MCInst &Inst, unsigned N) const addACC64DSPAsmRegOperands() argument 1173 addHI32DSPAsmRegOperands(MCInst &Inst, unsigned N) const addHI32DSPAsmRegOperands() argument 1178 addLO32DSPAsmRegOperands(MCInst &Inst, unsigned N) const addLO32DSPAsmRegOperands() argument 1183 addCCRAsmRegOperands(MCInst &Inst, unsigned N) const addCCRAsmRegOperands() argument 1188 addHWRegsAsmRegOperands(MCInst &Inst, unsigned N) const addHWRegsAsmRegOperands() argument 1194 addConstantUImmOperands(MCInst &Inst, unsigned N) const addConstantUImmOperands() argument 1204 addSImmOperands(MCInst &Inst, unsigned N) const addSImmOperands() argument 1213 addUImmOperands(MCInst &Inst, unsigned N) const addUImmOperands() argument 1222 addConstantSImmOperands(MCInst &Inst, unsigned N) const addConstantSImmOperands() argument 1231 addImmOperands(MCInst &Inst, unsigned N) const addImmOperands() argument 1237 addMemOperands(MCInst &Inst, unsigned N) const addMemOperands() argument 1248 addMicroMipsMemOperands(MCInst &Inst, unsigned N) const addMicroMipsMemOperands() argument 1257 addRegListOperands(MCInst &Inst, unsigned N) const addRegListOperands() argument 1742 hasShortDelaySlot(MCInst &Inst) hasShortDelaySlot() argument 1822 needsExpandMemInst(MCInst &Inst) needsExpandMemInst() argument 1856 processInstruction(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) processInstruction() argument 2357 tryExpandInstruction(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) tryExpandInstruction() argument 2607 expandJalWithRegs(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandJalWithRegs() argument 2834 expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandLoadImm() argument 3330 expandLoadSingleImmToGPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandLoadSingleImmToGPR() argument 3346 expandLoadSingleImmToFPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandLoadSingleImmToFPR() argument 3400 expandLoadDoubleImmToGPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandLoadDoubleImmToGPR() argument 3465 expandLoadDoubleImmToFPR(MCInst &Inst, bool Is64FPU, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandLoadDoubleImmToFPR() argument 3538 expandUncondBranchMMPseudo(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandUncondBranchMMPseudo() argument 3583 expandBranchImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandBranchImm() argument 3649 expandMem16Inst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI, bool IsLoad) expandMem16Inst() argument 3776 expandMem9Inst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI, bool IsLoad) expandMem9Inst() argument 3834 expandLoadStoreMultiple(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandLoadStoreMultiple() argument 3863 expandCondBranches(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandCondBranches() argument 4134 expandDivRem(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI, const bool IsMips64, const bool Signed) expandDivRem() argument 4305 expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandTrunc() argument 4344 expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandUlh() argument 4396 expandUsh(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandUsh() argument 4447 expandUxw(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandUxw() argument 4502 expandSge(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandSge() argument 4536 expandSgeImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandSgeImm() argument 4592 expandSgtImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandSgtImm() argument 4639 expandAliasImmediate(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandAliasImmediate() argument 4746 expandRotation(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandRotation() argument 4808 expandRotationImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandRotationImm() argument 4871 expandDRotation(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandDRotation() argument 4933 expandDRotationImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandDRotationImm() argument 5028 expandAbs(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandAbs() argument 5044 expandMulImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandMulImm() argument 5067 expandMulO(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandMulO() argument 5109 expandMulOU(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandMulOU() argument 5145 expandDMULMacro(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandDMULMacro() argument 5163 expandLoadStoreDMacro(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI, bool IsLoad) expandLoadStoreDMacro() argument 5211 expandStoreDM1Macro(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandStoreDM1Macro() argument 5248 expandSeq(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandSeq() argument 5274 expandSeqI(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandSeqI() argument 5331 getRegisterForMxtrDSP(MCInst &Inst, bool IsMFDSP) getRegisterForMxtrDSP() argument 5385 getRegisterForMxtrFP(MCInst &Inst, bool IsMFTC1) getRegisterForMxtrFP() argument 5424 getRegisterForMxtrC0(MCInst &Inst, bool IsMFTC0) getRegisterForMxtrC0() argument 5464 expandMXTRAlias(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandMXTRAlias() argument 5534 expandSaaAddr(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) expandSaaAddr() argument 5568 checkEarlyTargetMatchPredicate(MCInst &Inst, const OperandVector &Operands) checkEarlyTargetMatchPredicate() argument 5582 checkTargetMatchPredicate(MCInst &Inst) checkTargetMatchPredicate() argument 5738 MCInst Inst; MatchAndEmitInstruction() local 5943 ConvertXWPOperands(MCInst &Inst, const OperandVector &Operands) ConvertXWPOperands() argument [all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/AsmParser/
H A D	HexagonAsmParser.cpp	139 int processInstruction(MCInst &Inst, OperandVector const &Operands, 378 void addRegOperands(MCInst &Inst, unsigned N) const { in addRegOperands() 380 Inst.addOperand(MCOperand::createReg(getReg())); in addRegOperands() 383 void addImmOperands(MCInst &Inst, unsigned N) const { in addImmOperands() 385 Inst.addOperand(MCOperand::createExpr(getImm())); in addImmOperands() 388 void addSignedImmOperands(MCInst &Inst, unsigned N) const { in addSignedImmOperands() 394 Inst.addOperand(MCOperand::createExpr(Expr)); in addSignedImmOperands() 404 Inst.addOperand(MCOperand::createExpr(NewExpr)); in addSignedImmOperands() 407 void addn1ConstOperands(MCInst &Inst, unsigned N) const { in addn1ConstOperands() 408 addImmOperands(Inst, in addn1ConstOperands() 1281 processInstruction(MCInst &Inst, OperandVector const &Operands, SMLoc IDLoc) processInstruction() argument [all...]

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Indexes created Thu Nov 07 10:32:03 CST 2024