Searched refs:InputInt6 (Results 1 - 7 of 7) sorted by relevance
| /third_party/node/deps/v8/src/compiler/backend/ |
| H A D | code-generator-impl.h | 85 uint8_t InputInt6(size_t index) { in InputInt6() function in v8::internal::compiler::InstructionOperandConverter
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| H A D | code-generator-arm64.cc | 148 return Operand(InputRegister64(index), LSL, InputInt6(index + 1)); in InputOperand2_64()
150 return Operand(InputRegister64(index), LSR, InputInt6(index + 1)); in InputOperand2_64()
152 return Operand(InputRegister64(index), ASR, InputInt6(index + 1)); in InputOperand2_64()
154 return Operand(InputRegister64(index), ROR, InputInt6(index + 1)); in InputOperand2_64()
1461 __ Sbfx(i.OutputRegister(), i.InputRegister(0), i.InputInt6(1), in AssembleArchInstruction()
1462 i.InputInt6(2)); in AssembleArchInstruction()
1469 __ Ubfx(i.OutputRegister(), i.InputRegister(0), i.InputInt6(1), in AssembleArchInstruction()
1481 __ Bfi(i.OutputRegister(), i.InputRegister(1), i.InputInt6(2), in AssembleArchInstruction()
1482 i.InputInt6(3)); in AssembleArchInstruction()
2902 __ Tbz(i.InputRegister64(0), i.InputInt6( in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | code-generator-riscv64.cc | 2332 if (is_uint5(i.InputInt6(1) % 64)) { in AssembleArchInstruction()
2334 i.InputInt6(1) % 64); in AssembleArchInstruction()
2336 __ li(kScratchReg, i.InputInt6(1) % 64); in AssembleArchInstruction()
2386 if (is_uint5(i.InputInt6(1) % 64)) { in AssembleArchInstruction()
2388 i.InputInt6(1) % 64); in AssembleArchInstruction()
2390 __ li(kScratchReg, i.InputInt6(1) % 64); in AssembleArchInstruction()
2596 if (is_int5(i.InputInt6(1) % 64)) { in AssembleArchInstruction()
2598 i.InputInt6(1) % 64); in AssembleArchInstruction()
2600 __ li(kScratchReg, i.InputInt6(1) % 64); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/ia32/ |
| H A D | code-generator-ia32.cc | 1216 __ ShlPair(i.InputRegister(1), i.InputRegister(0), i.InputInt6(2)); in AssembleArchInstruction()
1224 __ ShrPair(i.InputRegister(1), i.InputRegister(0), i.InputInt6(2)); in AssembleArchInstruction()
1232 __ SarPair(i.InputRegister(1), i.InputRegister(0), i.InputInt6(2)); in AssembleArchInstruction()
1998 __ I64x2ShrS(dst, src, i.InputInt6(1), kScratchDoubleReg); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | code-generator-mips64.cc | 2345 i.InputInt6(1)); in AssembleArchInstruction()
2357 i.InputInt6(1)); in AssembleArchInstruction()
2369 i.InputInt6(1)); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | code-generator-mips.cc | 2239 i.InputInt6(1)); in AssembleArchInstruction()
2245 i.InputInt6(1)); in AssembleArchInstruction()
2251 i.InputInt6(1)); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/compiler/backend/x64/ |
| H A D | code-generator-x64.cc | 3055 __ I64x2ShrS(dst, src, i.InputInt6(1), kScratchDoubleReg); in AssembleArchInstruction()
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