/third_party/vixl/test/aarch64/ |
H A D | test-assembler-fp-aarch64.cc | 542 __ Fsub(s0, s17, s18); in TEST() 543 __ Fsub(s1, s18, s19); in TEST() 544 __ Fsub(s2, s14, s18); in TEST() 545 __ Fsub(s3, s18, s15); in TEST() 546 __ Fsub(s4, s18, s16); in TEST() 547 __ Fsub(s5, s15, s15); in TEST() 548 __ Fsub(s6, s16, s16); in TEST() 550 __ Fsub(d7, d30, d31); in TEST() 551 __ Fsub(d8, d29, d31); in TEST() 552 __ Fsub(d in TEST() [all...] |
H A D | test-assembler-sve-aarch64.cc | 12189 ArithFn fn = &MacroAssembler::Fsub; 14540 __ Fsub(z6.VnH(), z0.VnH(), z1.VnH()); 14571 __ Fsub(z10.VnS(), z0.VnS(), z1.VnS()); 14592 __ Fsub(z14.VnD(), z0.VnD(), z1.VnD()); 15005 masm->Fsub(z3.WithLaneSize(ls), p2m, z3.WithLaneSize(ls), rvrs); 15007 masm->Fsub(z4.WithLaneSize(ls), p2m, rvrs, z4.WithLaneSize(ls)); 15161 __ Fsub(z3.VnH(), p0m, z3.VnH(), 1.0); 15163 __ Fsub(z4.VnH(), p0m, 1.0, z4.VnH()); 15180 __ Fsub(z13.VnS(), p0m, z13.VnS(), 1.0); 15182 __ Fsub(z1 [all...] |
H A D | test-disasm-neon-aarch64.cc | 1835 COMPARE_MACRO(Fsub(v23.V8H(), v24.V8H(), v25.V8H()), in TEST() 1837 COMPARE_MACRO(Fsub(v26.V4H(), v27.V4H(), v28.V4H()), in TEST() 1949 COMPARE_MACRO(Fsub(v3.M, v4.M, v5.M), "fsub v3." S ", v4." S ", v5." S); in TEST()
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H A D | test-assembler-neon-aarch64.cc | 3731 __ Fsub(v0.V4H(), v1.V4H(), v0.V4H()); in TEST() 3732 __ Fsub(v8.V8H(), v3.V8H(), v2.V8H()); in TEST() 3733 __ Fsub(v9.V4H(), v4.V4H(), v3.V4H()); in TEST() 3734 __ Fsub(v10.V4H(), v0.V4H(), v1.V4H()); in TEST() 3736 __ Fsub(v11.V4H(), v6.V4H(), v2.V4H()); in TEST() 3737 __ Fsub(v12.V4H(), v7.V4H(), v7.V4H()); in TEST()
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H A D | test-disasm-sve-aarch64.cc | 990 COMPARE_MACRO(Fsub(z0.VnH(), p0.Merging(), z1.VnH(), z0.VnH()), in TEST() 1042 COMPARE_MACRO(Fsub(z5.VnD(), p5.Merging(), z6.VnD(), z7.VnD()), in TEST() 1105 COMPARE_MACRO(Fsub(z19.VnH(), p1.Merging(), z9.VnH(), 0.5), in TEST() 1108 COMPARE_MACRO(Fsub(z20.VnH(), p2.Merging(), 1.0, z10.VnH()), in TEST()
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
H A D | WasmTranslator.cpp | 422 Control()->appendInst(InstArithmetic::create(Func, InstArithmetic::Fsub, in Binop() 753 Func, InstArithmetic::Fsub, Dest, Ctx->getConstantFloat(0), Input)); in Unop() 759 Func, InstArithmetic::Fsub, Dest, Ctx->getConstantDouble(0), Input)); in Unop()
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H A D | IceConverter.cpp | 299 return convertArithInstruction(Instr, Ice::InstArithmetic::Fsub); in convertInstruction()
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H A D | IceTargetLoweringARM32.cpp | 2722 case InstArithmetic::Fsub: in lowerInt64Arithmetic() 2920 case InstArithmetic::Fsub: 2990 case InstArithmetic::Fsub: { 3324 case InstArithmetic::Fsub: 6662 case InstArithmetic::Fsub:
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H A D | IceTargetLoweringX8632.cpp | 1866 case InstArithmetic::Fsub: in lowerArithmetic() 2007 case InstArithmetic::Fsub: { in lowerArithmetic() 2324 case InstArithmetic::Fsub: in lowerArithmetic()
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H A D | PNaClTranslator.cpp | 1772 Op = Ice::InstArithmetic::Fsub; in convertBinopOpcode()
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H A D | IceTargetLoweringMIPS32.cpp | 2687 case InstArithmetic::Fsub: in lowerInt64Arithmetic() 2958 case InstArithmetic::Fsub: in lowerArithmetic()
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H A D | IceTargetLoweringX8664.cpp | 1807 case InstArithmetic::Fsub: { in lowerArithmetic() 2140 case InstArithmetic::Fsub: in lowerArithmetic()
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/third_party/node/deps/v8/src/wasm/baseline/arm64/ |
H A D | liftoff-assembler-arm64.h | 1122 FP32_BINOP(f32_sub, Fsub) 1135 FP64_BINOP(f64_sub, Fsub) 1845 Fsub(dst.fp().V2D(), lhs.fp().V2D(), rhs.fp().V2D()); in emit_f64x2_sub() 1986 Fsub(dst.fp().V4S(), lhs.fp().V4S(), rhs.fp().V4S()); in emit_f32x4_sub()
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/third_party/node/deps/v8/src/compiler/backend/arm64/ |
H A D | code-generator-arm64.cc | 1608 __ Fsub(i.OutputFloat32Register(), i.InputFloat32Register(0), in AssembleArchInstruction() 1652 __ Fsub(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction() 2166 SIMD_BINOP_LANE_SIZE_CASE(kArm64FSub, Fsub); in AssembleArchInstruction()
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/third_party/vixl/src/aarch64/ |
H A D | macro-assembler-aarch64.h | 1740 void Fsub(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fsub() function in vixl::aarch64::MacroAssembler 4861 void Fsub(const ZRegister& zd, in Fsub() function in vixl::aarch64::MacroAssembler 4869 void Fsub(const ZRegister& zd, in Fsub() function in vixl::aarch64::MacroAssembler 4877 void Fsub(const ZRegister& zd, 4881 void Fsub(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Fsub() function in vixl::aarch64::MacroAssembler
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H A D | macro-assembler-sve-aarch64.cc | 669 V(Fsub, fsub) \
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/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | macro-assembler-arm64-inl.h | 747 void TurboAssembler::Fsub(const VRegister& fd, const VRegister& fn, in Fsub() function in v8::internal::TurboAssembler
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H A D | macro-assembler-arm64.h | 1072 inline void Fsub(const VRegister& fd, const VRegister& fn,
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H A D | macro-assembler-arm64.cc | 1468 Fsub(dst, src, fp_zero); in CanonicalizeNaN()
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/third_party/skia/third_party/externals/swiftshader/src/Reactor/ |
H A D | SubzeroReactor.cpp | 1268 return createArithmetic(Ice::InstArithmetic::Fsub, lhs, rhs);
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