| /third_party/vixl/test/aarch64/ |
| H A D | test-assembler-fp-aarch64.cc | 1348 __ Fdiv(s0, s17, s18); in TEST()
1349 __ Fdiv(s1, s18, s19); in TEST()
1350 __ Fdiv(s2, s14, s18); in TEST()
1351 __ Fdiv(s3, s18, s15); in TEST()
1352 __ Fdiv(s4, s18, s16); in TEST()
1353 __ Fdiv(s5, s15, s16); in TEST()
1354 __ Fdiv(s6, s14, s14); in TEST()
1356 __ Fdiv(d7, d31, d30); in TEST()
1357 __ Fdiv(d8, d29, d31); in TEST()
1358 __ Fdiv(d in TEST()
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| H A D | test-disasm-sve-aarch64.cc | 1139 COMPARE_MACRO(Fdiv(z8.VnH(), p4.Merging(), z8.VnH(), z4.VnH()), in TEST()
1141 COMPARE_MACRO(Fdiv(z18.VnS(), p5.Merging(), z18.VnS(), z14.VnS()), in TEST()
1143 COMPARE_MACRO(Fdiv(z28.VnD(), p6.Merging(), z28.VnD(), z24.VnD()), in TEST()
1145 COMPARE_MACRO(Fdiv(z17.VnH(), p2.Merging(), z17.VnH(), z17.VnH()), in TEST()
1147 COMPARE_MACRO(Fdiv(z20.VnS(), p5.Merging(), z23.VnS(), z20.VnS()), in TEST()
1149 COMPARE_MACRO(Fdiv(z15.VnD(), p6.Merging(), z30.VnD(), z8.VnD()), in TEST()
1196 COMPARE_MACRO(Fdiv(z8.VnH(), p4.Merging(), z8.VnH(), z4.VnH()), in TEST()
1198 COMPARE_MACRO(Fdiv(z18.VnS(), p5.Merging(), z18.VnS(), z14.VnS()), in TEST()
1200 COMPARE_MACRO(Fdiv(z28.VnD(), p6.Merging(), z28.VnD(), z24.VnD()), in TEST()
1202 COMPARE_MACRO(Fdiv(z1 in TEST()
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| H A D | test-assembler-sve-aarch64.cc | 12411 &MacroAssembler::Fdiv,
12432 &MacroAssembler::Fdiv,
12453 &MacroAssembler::Fdiv,
15157 __ Fdiv(z1.VnH(), p1.Merging(), z1.VnH(), z1.VnH());
15176 __ Fdiv(z11.VnS(), p1.Merging(), z11.VnS(), z11.VnS());
15195 __ Fdiv(z21.VnD(), p1.Merging(), z21.VnD(), z21.VnD());
16417 __ Fdiv(z10.VnH(), p0.Merging(), z10.VnH(), z10.VnH());
16427 __ Fdiv(z10.VnS(), p0.Merging(), z10.VnS(), z10.VnS());
16437 __ Fdiv(z10.VnD(), p0.Merging(), z10.VnD(), z10.VnD());
16591 __ Fdiv(z
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| H A D | test-disasm-neon-aarch64.cc | 1870 COMPARE_MACRO(Fdiv(v15.V8H(), v16.V8H(), v17.V8H()), in TEST()
1872 COMPARE_MACRO(Fdiv(v18.V4H(), v19.V4H(), v20.V4H()), in TEST()
1959 COMPARE_MACRO(Fdiv(v9.M, v10.M, v11.M), "fdiv v9." S ", v10." S ", v11." S); in TEST()
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| H A D | test-assembler-neon-aarch64.cc | 3803 __ Fdiv(v6.V4H(), v0.V4H(), v1.V4H()); in TEST()
3804 __ Fdiv(v7.V8H(), v2.V8H(), v3.V8H()); in TEST()
3805 __ Fdiv(v8.V4H(), v4.V4H(), v3.V4H()); in TEST()
3806 __ Fdiv(v9.V4H(), v1.V4H(), v0.V4H()); in TEST()
3807 __ Fdiv(v10.V4H(), v5.V4H(), v0.V4H()); in TEST()
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| /third_party/vixl/benchmarks/aarch64/ |
| H A D | bench-utils.cc | 372 __ Fdiv(PickV(size), PickV(size), PickV(size)); in GenerateFPSequence()
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| /third_party/node/deps/v8/src/wasm/baseline/arm64/ |
| H A D | liftoff-assembler-arm64.h | 1124 FP32_BINOP(f32_div, Fdiv)
1137 FP64_BINOP(f64_div, Fdiv)
1855 Fdiv(dst.fp().V2D(), lhs.fp().V2D(), rhs.fp().V2D()); in emit_f64x2_div()
1996 Fdiv(dst.fp().V4S(), lhs.fp().V4S(), rhs.fp().V4S()); in emit_f32x4_div()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceConverter.cpp | 303 return convertArithInstruction(Instr, Ice::InstArithmetic::Fdiv); in convertInstruction()
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| H A D | IceTargetLoweringARM32.cpp | 453 case InstArithmetic::Fdiv: in genTargetHelperCallFor()
2724 case InstArithmetic::Fdiv: in lowerInt64Arithmetic()
3011 case InstArithmetic::Fdiv: {
3326 case InstArithmetic::Fdiv:
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| H A D | WasmTranslator.cpp | 447 Control()->appendInst(InstArithmetic::create(Func, InstArithmetic::Fdiv, in Binop()
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| H A D | IceTargetLoweringX8632.cpp | 1868 case InstArithmetic::Fdiv: in lowerArithmetic()
2019 case InstArithmetic::Fdiv: { in lowerArithmetic()
2334 case InstArithmetic::Fdiv: in lowerArithmetic()
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| H A D | PNaClTranslator.cpp | 1791 Op = Ice::InstArithmetic::Fdiv; in convertBinopOpcode()
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| H A D | IceTargetLoweringMIPS32.cpp | 2689 case InstArithmetic::Fdiv: in lowerInt64Arithmetic()
2982 case InstArithmetic::Fdiv: in lowerArithmetic()
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| H A D | IceTargetLoweringX8664.cpp | 1819 case InstArithmetic::Fdiv: { in lowerArithmetic()
2150 case InstArithmetic::Fdiv: in lowerArithmetic()
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| H A D | code-generator-arm64.cc | 1616 __ Fdiv(i.OutputFloat32Register(), i.InputFloat32Register(0), in AssembleArchInstruction()
1660 __ Fdiv(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction()
2168 SIMD_BINOP_LANE_SIZE_CASE(kArm64FDiv, Fdiv); in AssembleArchInstruction()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 610 void TurboAssembler::Fdiv(const VRegister& fd, const VRegister& fn, in Fdiv() function in v8::internal::TurboAssembler
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| H A D | macro-assembler-arm64.h | 1074 inline void Fdiv(const VRegister& fd, const VRegister& fn,
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| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-sve-aarch64.cc | 668 V(Fdiv, fdiv) \
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| H A D | macro-assembler-aarch64.h | 1623 void Fdiv(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fdiv() function in vixl::aarch64::MacroAssembler
4545 void Fdiv(const ZRegister& zd,
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| /third_party/skia/third_party/externals/swiftshader/src/Reactor/ |
| H A D | SubzeroReactor.cpp | 1280 return createArithmetic(Ice::InstArithmetic::Fdiv, lhs, rhs);
|