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Searched refs:FSIN (Results 1 - 25 of 26) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h640 FNEG, FABS, FSQRT, FCBRT, FSIN, FCOS, FPOWI, FPOW, enumerator
H A DBasicTTIImpl.h1223 ISDs.push_back(ISD::FSIN); in getIntrinsicInstrCost()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp196 case ISD::FSIN: return "fsin"; in getOperationName()
H A DLegalizeFloatTypes.cpp117 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break; in SoftenFloatResult()
1174 case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break; in ExpandFloatResult()
2120 case ISD::FSIN: in PromoteFloatResult()
H A DLegalizeDAG.cpp2259 unsigned OtherOpcode = Node->getOpcode() == ISD::FSIN
2260 ? ISD::FCOS : ISD::FSIN;
3192 case ISD::FSIN:
3960 case ISD::FSIN:
4509 case ISD::FSIN:
H A DLegalizeVectorOps.cpp420 case ISD::FSIN: in LegalizeOp()
H A DLegalizeVectorTypes.cpp96 case ISD::FSIN: in ScalarizeVectorResult()
890 case ISD::FSIN: in SplitVectorResult()
2816 case ISD::FSIN: in WidenVectorResult()
H A DTargetLowering.cpp5590 case ISD::FSIN: in isNegatibleForFree()
5713 case ISD::FSIN:
H A DSelectionDAGBuilder.cpp6185 case Intrinsic::sin: Opcode = ISD::FSIN; break; in visitIntrinsicCall()
7660 if (visitUnaryFloatCall(I, ISD::FSIN)) in visitCall()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp145 setOperationAction(ISD::FSIN, MVT::f32, Custom); in R600TargetLowering()
488 case ISD::FSIN: return LowerTrig(Op, DAG); in LowerOperation()
775 case ISD::FSIN: in LowerTrig()
H A DSIISelLowering.cpp441 setOperationAction(ISD::FSIN, MVT::f32, Custom); in SITargetLowering()
503 setOperationAction(ISD::FSIN, MVT::f16, Promote); in SITargetLowering()
4048 case ISD::FSIN: in LowerOperation()
7993 case ISD::FSIN: in LowerTrig()
8607 case ISD::FSIN: in fp16SrcZerosHighBits()
8801 case ISD::FSIN: in isCanonicalized()
H A DAMDGPUISelLowering.cpp424 setOperationAction(ISD::FSIN, VT, Expand); in AMDGPUTargetLowering()
522 case ISD::FSIN: in fnegFoldsIntoOp()
3809 case ISD::FSIN: in performFNegCombine()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1616 setOperationAction(ISD::FSIN , MVT::f128, Expand); in SparcTargetLowering()
1621 setOperationAction(ISD::FSIN , MVT::f64, Expand); in SparcTargetLowering()
1626 setOperationAction(ISD::FSIN , MVT::f32, Expand); in SparcTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp94 {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FMA}) in WebAssemblyTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp269 setOperationAction(ISD::FSIN, MVT::f128, Expand); in AArch64TargetLowering()
386 setOperationAction(ISD::FSIN, MVT::f32, Expand); in AArch64TargetLowering()
387 setOperationAction(ISD::FSIN, MVT::f64, Expand); in AArch64TargetLowering()
411 setOperationAction(ISD::FSIN, MVT::f16, Promote); in AArch64TargetLowering()
412 setOperationAction(ISD::FSIN, MVT::v4f16, Expand); in AArch64TargetLowering()
413 setOperationAction(ISD::FSIN, MVT::v8f16, Expand); in AArch64TargetLowering()
720 setOperationAction(ISD::FSIN, MVT::v1f64, Expand); in AArch64TargetLowering()
879 setOperationAction(ISD::FSIN, VT, Expand); in addTypeForNEON()
/third_party/mesa3d/src/mesa/x86/
H A Dassyntax.h765 #define FSIN CHOICE(fsin, fsin, fsin) macro
1478 #define FSIN fsin macro
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1437 {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, ISD::FSINCOS, in HexagonTargetLowering()
1482 ISD::FREM, ISD::FNEG, ISD::FABS, ISD::FSQRT, ISD::FSIN, in HexagonTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp273 setOperationAction(ISD::FSIN , MVT::f64, Expand); in PPCTargetLowering()
278 setOperationAction(ISD::FSIN , MVT::f32, Expand); in PPCTargetLowering()
649 setOperationAction(ISD::FSIN, VT, Expand); in PPCTargetLowering()
942 setOperationAction(ISD::FSIN , MVT::f128, Expand); in PPCTargetLowering()
1004 setOperationAction(ISD::FSIN , MVT::v4f64, Expand); in PPCTargetLowering()
1049 setOperationAction(ISD::FSIN , MVT::v4f32, Expand); in PPCTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp164 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FP16_TO_FP, in RISCVTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp349 setOperationAction(ISD::FSIN, VT, Expand); in addMVEVectorTypes()
797 setOperationAction(ISD::FSIN, MVT::v2f64, Expand); in ARMTargetLowering()
818 setOperationAction(ISD::FSIN, MVT::v4f32, Expand); in ARMTargetLowering()
834 setOperationAction(ISD::FSIN, MVT::v2f32, Expand); in ARMTargetLowering()
963 setOperationAction(ISD::FSIN, MVT::f64, Expand); in ARMTargetLowering()
1323 setOperationAction(ISD::FSIN, MVT::f64, Expand); in ARMTargetLowering()
1324 setOperationAction(ISD::FSIN, MVT::f32, Expand); in ARMTargetLowering()
1407 setOperationAction(ISD::FSIN, MVT::f16, Promote); in ARMTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp434 setOperationAction(ISD::FSIN, MVT::f32, Expand); in MipsTargetLowering()
435 setOperationAction(ISD::FSIN, MVT::f64, Expand); in MipsTargetLowering()
H A DMipsSEISelLowering.cpp149 setOperationAction(ISD::FSIN, MVT::f16, Promote); in MipsSETargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp572 for (const auto &Op : {ISD::FDIV, ISD::FREM, ISD::FSQRT, ISD::FSIN, ISD::FCOS, in NVPTXTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp536 setOperationAction(ISD::FSIN , VT, Expand); in X86TargetLowering()
567 setOperationAction(ISD::FSIN , MVT::f32, Expand); in X86TargetLowering()
573 setOperationAction(ISD::FSIN, MVT::f64, Expand); in X86TargetLowering()
588 setOperationAction(ISD::FSIN , VT, Expand); in X86TargetLowering()
654 setOperationAction(ISD::FSIN , MVT::f80, Expand); in X86TargetLowering()
703 setOperationAction(ISD::FSIN, MVT::f128, LibCall); in X86TargetLowering()
757 setOperationAction(ISD::FSIN, VT, Expand); in X86TargetLowering()
1979 ISD::FSIN, ISD::STRICT_FSIN}) in X86TargetLowering()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp457 setOperationAction(ISD::FSIN, VT, Expand); in SystemZTargetLowering()

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