/third_party/node/deps/v8/src/wasm/ |
H A D | wasm-opcodes-inl.h | 272 CASE_SIMDF_OP(ExtractLane, "extract_lane") in OpcodeName() 274 CASE_I64x2_OP(ExtractLane, "extract_lane") in OpcodeName() 275 CASE_I32x4_OP(ExtractLane, "extract_lane") in OpcodeName() 276 CASE_SIGN_OP(I16x8, ExtractLane, "extract_lane") in OpcodeName() 277 CASE_SIGN_OP(I8x16, ExtractLane, "extract_lane") in OpcodeName()
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/third_party/node/deps/v8/src/codegen/arm/ |
H A D | macro-assembler-arm.h | 456 void ExtractLane(Register dst, QwNeonRegister src, NeonDataType dt, int lane); 457 void ExtractLane(Register dst, DwVfpRegister src, NeonDataType dt, int lane); 458 void ExtractLane(SwVfpRegister dst, QwNeonRegister src, int lane); 459 void ExtractLane(DwVfpRegister dst, QwNeonRegister src, int lane);
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H A D | macro-assembler-arm.cc | 1086 void TurboAssembler::ExtractLane(Register dst, QwNeonRegister src, in CallRecordWriteStub() function in v8::internal::TurboAssembler 1098 void TurboAssembler::ExtractLane(Register dst, DwVfpRegister src, in CallRecordWriteStub() function in v8::internal::TurboAssembler 1107 void TurboAssembler::ExtractLane(SwVfpRegister dst, QwNeonRegister src, in CallRecordWriteStub() function in v8::internal::TurboAssembler 1113 void TurboAssembler::ExtractLane(DwVfpRegister dst, QwNeonRegister src, in CallRecordWriteStub() function in v8::internal::TurboAssembler
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/third_party/node/deps/v8/src/wasm/baseline/arm/ |
H A D | liftoff-assembler-arm.h | 434 assm->ExtractLane(dst.gp(), scratch, NeonS32, 0); in EmitAnyTrue() 2472 ExtractLane(dst.fp(), liftoff::GetSimd128Register(lhs), imm_lane_idx); in emit_f64x2_extract_lane() 2655 ExtractLane(liftoff::GetFloatRegister(dst.fp()), in emit_f32x4_extract_lane() 2839 ExtractLane(dst.low_gp(), liftoff::GetSimd128Register(lhs), NeonS32, in emit_i64x2_extract_lane() 2841 ExtractLane(dst.high_gp(), liftoff::GetSimd128Register(lhs), NeonS32, in emit_i64x2_extract_lane() 3025 ExtractLane(dst.gp(), liftoff::GetSimd128Register(lhs), NeonS32, in emit_i32x4_extract_lane() 3050 ExtractLane(dst.gp(), scratch, NeonS32, 0); in emit_i32x4_alltrue() 3235 ExtractLane(dst.gp(), scratch, NeonS16, 0); 3377 ExtractLane(dst.gp(), liftoff::GetSimd128Register(lhs), NeonU16, 3384 ExtractLane(ds [all...] |
/third_party/node/deps/v8/src/compiler/backend/arm/ |
H A D | code-generator-arm.cc | 1822 __ ExtractLane(i.OutputDoubleRegister(), i.InputSimd128Register(0), in AssembleArchInstruction() 2171 __ ExtractLane(i.OutputFloatRegister(), i.InputSimd128Register(0), in AssembleArchInstruction() 2318 __ ExtractLane(i.OutputRegister(), i.InputSimd128Register(0), NeonS32, in AssembleArchInstruction() 2514 __ ExtractLane(i.OutputRegister(), i.InputSimd128Register(0), NeonU16, in AssembleArchInstruction() 2519 __ ExtractLane(i.OutputRegister(), i.InputSimd128Register(0), NeonS16, in AssembleArchInstruction() 2695 __ ExtractLane(i.OutputRegister(), i.InputSimd128Register(0), NeonU8, in AssembleArchInstruction() 2700 __ ExtractLane(i.OutputRegister(), i.InputSimd128Register(0), NeonS8, in AssembleArchInstruction() 3184 __ ExtractLane(i.OutputRegister(), scratch, NeonS32, 0); in AssembleArchInstruction() 3199 __ ExtractLane(i.OutputRegister(), scratch, NeonS32, 0); in AssembleArchInstruction() 3211 __ ExtractLane( in AssembleArchInstruction() [all...] |
H A D | instruction-selector-arm.cc | 2755 void InstructionSelector::Visit##Type##ExtractLane##Sign(Node* node) { \ 2756 VisitRRI(this, kArm##Type##ExtractLane##Sign, node); \
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/third_party/node/deps/v8/src/compiler/ |
H A D | machine-operator.cc | 1955 const Operator* MachineOperatorBuilder::Type##ExtractLane##Sign( \ 1959 IrOpcode::k##Type##ExtractLane##Sign, Operator::kPure, \ 1960 "" #Type "ExtractLane" #Sign, 1, 0, 0, 1, 0, 0, lane_index); \
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/third_party/node/deps/v8/src/compiler/backend/mips/ |
H A D | instruction-selector-mips.cc | 2321 void InstructionSelector::Visit##Type##ExtractLane##Sign(Node* node) { \ 2322 VisitRRI(this, kMips##Type##ExtractLane##Sign, node); \
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/third_party/node/deps/v8/src/compiler/backend/ppc/ |
H A D | instruction-selector-ppc.cc | 2394 void InstructionSelector::Visit##Type##ExtractLane##Sign(Node* node) { \ 2397 Emit(kPPC_##Type##ExtractLane##Sign, g.DefineAsRegister(node), \
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/third_party/node/deps/v8/src/compiler/backend/s390/ |
H A D | instruction-selector-s390.cc | 2604 void InstructionSelector::Visit##Type##ExtractLane##Sign(Node* node) { \ 2607 Emit(kS390_##Type##ExtractLane##Sign, g.DefineAsRegister(node), \
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/third_party/node/deps/v8/src/compiler/backend/mips64/ |
H A D | instruction-selector-mips64.cc | 3084 void InstructionSelector::Visit##Type##ExtractLane##Sign(Node* node) { \ 3085 VisitRRI(this, kMips64##Type##ExtractLane##Sign, node); \
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/third_party/node/deps/v8/src/compiler/backend/arm64/ |
H A D | instruction-selector-arm64.cc | 3617 void InstructionSelector::Visit##Type##ExtractLane##Sign(Node* node) { \ 3619 kArm64##T##ExtractLane##Sign | LaneSizeField::encode(LaneSize), \
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/third_party/node/deps/v8/src/compiler/backend/loong64/ |
H A D | instruction-selector-loong64.cc | 2828 void InstructionSelector::Visit##Type##ExtractLane##Sign(Node* node) { \ 2829 VisitRRI(this, kLoong64##Type##ExtractLane##Sign, node); \
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/third_party/node/deps/v8/src/compiler/backend/riscv64/ |
H A D | instruction-selector-riscv64.cc | 3057 void InstructionSelector::Visit##Type##ExtractLane##Sign(Node* node) { \ 3058 VisitRRI(this, kRiscv##Type##ExtractLane##Sign, node); \
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/third_party/node/deps/v8/src/compiler/backend/x64/ |
H A D | instruction-selector-x64.cc | 3253 void InstructionSelector::Visit##Type##ExtractLane##Sign(Node* node) { \
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