| /third_party/musl/porting/liteos_m/kernel/include/arpa/ |
| H A D | telnet.h | 20 #define EOR 239 macro
27 #define telcmds ((char [][6]){ "EOF", "SUSP", "ABORT", "EOR", "SE", "NOP", "DMARK", "BRK", "IP", "AO", "AYT", "EC", "EL", "GA", "SB", "WILL", "WONT", "DO", "DONT", "IAC", 0 })
150 #define SLC_NAMELIST "0", "SYNCH", "BRK", "IP", "AO", "AYT", "EOR", \
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| /third_party/musl/porting/liteos_m_iccarm/kernel/include/arpa/ |
| H A D | telnet.h | 20 #define EOR 239 macro
27 #define telcmds ((char [][6]){ "EOF", "SUSP", "ABORT", "EOR", "SE", "NOP", "DMARK", "BRK", "IP", "AO", "AYT", "EC", "EL", "GA", "SB", "WILL", "WONT", "DO", "DONT", "IAC", 0 })
150 #define SLC_NAMELIST "0", "SYNCH", "BRK", "IP", "AO", "AYT", "EOR", \
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| /third_party/musl/porting/uniproton/kernel/include/arpa/ |
| H A D | telnet.h | 20 #define EOR 239 macro
27 #define telcmds ((char [][6]){ "EOF", "SUSP", "ABORT", "EOR", "SE", "NOP", "DMARK", "BRK", "IP", "AO", "AYT", "EC", "EL", "GA", "SB", "WILL", "WONT", "DO", "DONT", "IAC", 0 })
150 #define SLC_NAMELIST "0", "SYNCH", "BRK", "IP", "AO", "AYT", "EOR", \
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| /third_party/musl/include/arpa/ |
| H A D | telnet.h | 20 #define EOR 239 macro
27 #define telcmds ((char [][6]){ "EOF", "SUSP", "ABORT", "EOR", "SE", "NOP", "DMARK", "BRK", "IP", "AO", "AYT", "EC", "EL", "GA", "SB", "WILL", "WONT", "DO", "DONT", "IAC", 0 })
150 #define SLC_NAMELIST "0", "SYNCH", "BRK", "IP", "AO", "AYT", "EOR", \
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | constants-arm64.h | 599 EOR = 0x40000000,
600 EON = EOR | NOT,
614 EOR_w_imm = LogicalImmediateFixed | EOR,
615 EOR_x_imm = LogicalImmediateFixed | EOR | SixtyFourBits,
637 EOR_w = LogicalShiftedFixed | EOR,
638 EOR_x = LogicalShiftedFixed | EOR | SixtyFourBits,
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| H A D | macro-assembler-arm64.cc | 192 case EOR: in LogicalMacro()
210 case EOR: in LogicalMacro()
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| H A D | macro-assembler-arm64-inl.h | 75 LogicalMacro(rd, rn, operand, EOR); in Eor()
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| H A D | assembler-arm64.cc | 945 Logical(rd, rn, operand, EOR); in eor()
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | constants-arm.h | 121 EOR = 1 << 21, // Logical Exclusive OR. enumerator
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| H A D | assembler-arm.cc | 1227 (opcode == BIC) || (opcode == EOR) || (opcode == ORR) || in AddrMode1()
1548 AddrMode1(cond | EOR | s, dst, src1, src2); in eor()
1553 AddrMode1(cond | EOR | s, dst, src1, Operand(src2)); in eor()
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| /third_party/python/Lib/ |
| H A D | telnetlib.py | 100 EOR = bytes([25]) # end or record variable
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| /third_party/vixl/src/aarch64/ |
| H A D | constants-aarch64.h | 751 EOR = 0x40000000, enumerator
752 EON = EOR | NOT,
766 EOR_w_imm = LogicalImmediateFixed | EOR,
767 EOR_x_imm = LogicalImmediateFixed | EOR | SixtyFourBits,
789 EOR_w = LogicalShiftedFixed | EOR,
790 EOR_x = LogicalShiftedFixed | EOR | SixtyFourBits,
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| H A D | macro-assembler-aarch64.cc | 858 LogicalMacro(rd, rn, operand, EOR); in Emit()
915 case EOR: in Emit()
934 case EOR: in Emit()
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| H A D | simulator-aarch64.cc | 2542 SVEBitwiseLogicalUnpredicatedHelper(EOR, kFormatVnD, result, zn, result); in Simulator()
2547 SVEBitwiseLogicalUnpredicatedHelper(EOR, kFormatVnD, result, zn, result); in Simulator()
4049 case EOR: in Simulator()
9723 logical_op = EOR; in Simulator()
11139 SVEBitwiseLogicalUnpredicatedHelper(EOR, vform, result, zdn, zm); in Simulator()
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| H A D | assembler-aarch64.cc | 632 Logical(rd, rn, operand, EOR); in eor()
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| H A D | logic-aarch64.cc | 7152 case EOR:
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| /third_party/pcre2/pcre2/src/sljit/ |
| H A D | sljitNativeARM_32.c | 102 #define EOR 0xe0200000 macro
1501 return push_inst(compiler, (EOR ^ 0xf0000000) | SRC2_IMM | RD(dst) | RN(dst) | 0x1f); in emit_single_op()
1557 return push_inst(compiler, EOR | (flags & SET_FLAGS) | RD(dst) | RN(src1) | ((src2 & SRC2_IMM) ? src2 : RM(src2))); in emit_single_op()
2281 FAIL_IF(push_inst(compiler, EOR | SRC2_IMM | RD(TMP_REG2) | RN(src2) | 0x1f)); in sljit_emit_shift_into()
3117 ins = (op == SLJIT_AND ? AND : (op == SLJIT_OR ? ORR : EOR)); in sljit_emit_op_flags()
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| H A D | sljitNativeARM_64.c | 87 #define EOR 0xca000000 macro
857 FAIL_IF(push_inst(compiler, (EOR ^ inv_bits) | RD(dst) | RN(arg1) | RM(arg2))); in emit_op_imm()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 1524 auto EOR = buildMI(MBB, MBBI, AVR::EORRdRr) in expand() local
1530 EOR->getOperand(3).setIsDead(); in expand()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/ |
| H A D | assembler_arm.cc | 186 EmitType01(cond, o.type(), EOR, 0, rn, rd, o);
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| /third_party/node/deps/v8/src/execution/arm/ |
| H A D | simulator-arm.cc | 2418 case EOR: { in DecodeType01()
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| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.cc | 1907 case EOR:
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