| /third_party/node/deps/v8/src/regexp/mips64/ |
| H A D | regexp-macro-assembler-mips64.cc | 267 __ Dsubu(a1, a1, a0); // Length of capture. in CheckNotBackReferenceIgnoreCase()
294 __ Dsubu(a2, a2, Operand(a1)); in CheckNotBackReferenceIgnoreCase()
315 __ Dsubu(a3, a3, Operand('a')); in CheckNotBackReferenceIgnoreCase()
318 __ Dsubu(a3, a3, Operand(224 - 'a')); in CheckNotBackReferenceIgnoreCase()
333 __ Dsubu(current_input_offset(), a2, end_of_input_address()); in CheckNotBackReferenceIgnoreCase()
338 __ Dsubu(current_input_offset(), current_input_offset(), Operand(a2)); in CheckNotBackReferenceIgnoreCase()
365 __ Dsubu(a1, a1, Operand(s3)); in CheckNotBackReferenceIgnoreCase()
383 __ Dsubu(current_input_offset(), current_input_offset(), Operand(s3)); in CheckNotBackReferenceIgnoreCase()
400 __ Dsubu(a1, a1, a0); // Length to check. in CheckNotBackReference()
421 __ Dsubu(a in CheckNotBackReference()
[all...] |
| /third_party/node/deps/v8/src/builtins/mips64/ |
| H A D | builtins-mips64.cc | 84 __ Dsubu(scratch, argc, Operand(kJSArgcReceiverSlots)); in Generate_PushArguments()
421 __ Dsubu(a3, a3, Operand(kJSArgcReceiverSlots)); in Generate_ResumeGeneratorTrampoline()
427 __ Dsubu(a3, a3, Operand(1)); in Generate_ResumeGeneratorTrampoline()
1165 __ Dsubu(sp_minus_frame_size, sp, frame_size); in Generate_BaselineOutOfLinePrologue()
1300 __ Dsubu(a5, sp, Operand(a4)); in Generate_InterpreterEntryTrampoline()
1314 __ Dsubu(a4, a4, Operand(kPointerSize)); in Generate_InterpreterEntryTrampoline()
1449 __ Dsubu(scratch, num_args, Operand(1)); in GenerateInterpreterPushArgs()
1451 __ Dsubu(start_address, start_address, scratch); in GenerateInterpreterPushArgs()
1473 __ Dsubu(a0, a0, Operand(1)); in Generate_InterpreterPushArgsThenCallImpl()
1477 __ Dsubu(a in Generate_InterpreterPushArgsThenCallImpl()
[all...] |
| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | macro-assembler-mips64.h | 105 void AllocateStackSpace(Register bytes) { Dsubu(sp, sp, bytes); } in AllocateStackSpace()
110 Dsubu(sp, sp, Operand(bytes)); in AllocateStackSpace()
310 Dsubu(sp, sp, Operand(2 * kPointerSize)); in Push()
317 Dsubu(sp, sp, Operand(3 * kPointerSize)); in Push()
325 Dsubu(sp, sp, Operand(4 * kPointerSize)); in Push()
335 Dsubu(sp, sp, Operand(5 * kPointerSize)); in Push()
346 Dsubu(sp, sp, Operand(kPointerSize)); in Push()
445 DEFINE_INSTRUCTION(Dsubu)
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| H A D | macro-assembler-mips64.cc | 398 void TurboAssembler::Dsubu(Register rd, Register rs, const Operand& rt) { in CallRecordWriteStub() function in v8::internal::TurboAssembler
1869 Dsubu(rd, zero_reg, rd); in CallRecordWriteStub()
1923 Dsubu(sp, sp, Operand(stack_offset)); in CallRecordWriteStub()
1948 Dsubu(sp, sp, Operand(stack_offset)); in CallRecordWriteStub()
1973 Dsubu(sp, sp, Operand(stack_offset)); in CallRecordWriteStub()
2064 Dsubu(scratch, zero_reg, pos); in CallRecordWriteStub()
3053 Dsubu(t9, rs, rt); in CallRecordWriteStub()
3071 Dsubu(t9, rs, rt); in CallRecordWriteStub()
3220 Dsubu(rd, scratch, rd); in CallRecordWriteStub()
3291 Dsubu(scratc in CallRecordWriteStub()
[all...] |
| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | code-generator-mips64.cc | 365 __ Dsubu(i.TempRegister(0), i.TempRegister(0), \
406 __ Dsubu(i.TempRegister(0), i.TempRegister(0), \
452 __ Dsubu(i.TempRegister(0), i.TempRegister(0), \
523 tasm->Dsubu(sp, sp, stack_slot_delta * kSystemPointerSize); in AdjustStackPointerForTailCall()
810 __ Dsubu(lhs_register, sp, offset); in AssembleArchInstruction()
953 __ Dsubu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); in AssembleArchInstruction()
1751 __ Dsubu(sp, sp, Operand(i.InputInt32(0))); in AssembleArchInstruction()
2033 ATOMIC_BINOP_CASE(Sub, Subu, Dsubu) in AssembleArchInstruction()
4166 __ Dsubu(sp, sp, Operand(kSystemPointerSize)); in AssembleConstructFrame()
4187 __ Dsubu(s in AssembleConstructFrame()
[all...] |
| /third_party/node/deps/v8/src/baseline/mips64/ |
| H A D | baseline-assembler-mips64-inl.h | 446 __ Dsubu(reg, reg, Operand(case_value_base)); in Switch()
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| /third_party/node/deps/v8/src/wasm/baseline/mips64/ |
| H A D | liftoff-assembler-mips64.h | 724 Dsubu(temp0, temp0, Operand(temp3)); \
777 ATOMIC_BINOP_CASE(Sub, Subu, Dsubu)
802 Dsubu(temp0, temp0, Operand(temp1)); \
875 Dsubu(temp0, temp0, Operand(temp1)); \
1834 TurboAssembler::Dsubu(value, value, Operand(subtrahend)); in emit_i32_subi_jump_negative()
|