/third_party/node/deps/v8/src/compiler/backend/ia32/ |
H A D | instruction-selector-ia32.cc | 331 selector->Emit(opcode, g.DefineSameAsFirst(node), operand0, operand1); in VisitRROFloat() 347 selector->Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(input), in VisitFloatUnop() 359 selector->Emit(sse_opcode, g.DefineSameAsFirst(node), operand0); in VisitRRSimd() 379 selector->Emit(sse_opcode, g.DefineSameAsFirst(node), operand0, in VisitRROSimd() 388 : g.DefineSameAsFirst(node); in VisitRRRSimd() 417 selector->Emit(sse_opcode, g.DefineSameAsFirst(node), operand0, operand1); in VisitRRISimd() 425 selector->Emit(opcode, g.DefineSameAsFirst(node), in VisitRROSimdShift() 432 selector->Emit(opcode, g.DefineSameAsFirst(node), operand0, operand1, in VisitRROSimdShift() 450 : g.DefineSameAsFirst(node); in VisitI8x16Shift() 507 : g.DefineSameAsFirst(nod in VisitLoadLane() [all...] |
/third_party/node/deps/v8/src/compiler/backend/x64/ |
H A D | instruction-selector-x64.cc | 530 InstructionOperand outputs[] = {g.DefineSameAsFirst(node)}; in VisitAtomicExchange() 756 outputs[output_count++] = g.DefineSameAsFirst(node); in VisitBinop() 797 Emit(kX64And32, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitWord64And() 816 Emit(kX64Not32, g.DefineSameAsFirst(node), g.UseRegister(m.left().node())); in VisitWord32Xor() 826 Emit(kX64Not, g.DefineSameAsFirst(node), g.UseRegister(m.left().node())); in VisitWord64Xor() 929 selector->Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(left), in VisitWord32Shift() 932 selector->Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(left), in VisitWord32Shift() 947 selector->Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(left), in VisitWord64Shift() 956 selector->Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(left), in VisitWord64Shift() 975 InstructionOperand output = g.DefineSameAsFirst(nod in TryVisitWordShift() [all...] |
/third_party/node/deps/v8/src/compiler/backend/arm/ |
H A D | instruction-selector-arm.cc | 130 // Use DefineSameAsFirst for binary ops that clobber their inputs, e.g. the in VisitRRRShuffle() 132 selector->Emit(opcode, g.DefineSameAsFirst(node), in VisitRRRShuffle() 532 InstructionOperand output = g.DefineSameAsFirst(node); in VisitLoadLane() 1055 Emit(kArmBfc, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitWord32And() 1223 g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)), in VisitInt32PairAdd() 1248 g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)), in VisitInt32PairSub() 1271 g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)), in VisitInt32PairMul() 1635 Emit(kArmVmlaF32, g.DefineSameAsFirst(node), in VisitFloat32Add() 1642 Emit(kArmVmlaF32, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitFloat32Add() 1655 Emit(kArmVmlaF64, g.DefineSameAsFirst(nod in VisitFloat64Add() [all...] |
/third_party/node/deps/v8/src/compiler/backend/riscv64/ |
H A D | instruction-selector-riscv64.cc | 185 opcode, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)), in VisitRRRR() 324 outputs[output_count++] = g.DefineSameAsFirst(node); in VisitBinop() 464 Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(2)), in VisitLoadLane() 700 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(mleft.left().node())); in VisitWord64And() 831 Emit(kRiscvShl64, g.DefineSameAsFirst(node), in VisitWord64Shl() 980 Emit(kRiscvMulHigh64, g.DefineSameAsFirst(node), in VisitInt32Mul() 1087 Emit(kRiscvDiv64, g.DefineSameAsFirst(node), in VisitInt32Div() 1094 Emit(kRiscvDiv32, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitInt32Div() 1101 Emit(kRiscvDivU32, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitUint32Div() 1116 Emit(kRiscvMod64, g.DefineSameAsFirst(nod in VisitInt32Mod() [all...] |
/third_party/node/deps/v8/src/compiler/backend/mips/ |
H A D | instruction-selector-mips.cc | 127 opcode, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)), in VisitRRRR() 206 outputs[output_count++] = g.DefineSameAsFirst(node); in VisitBinop() 511 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(mleft.left().node())); in VisitWord32And() 529 Emit(kMipsIns, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitWord32And() 664 selector->Emit(single_opcode, g.DefineSameAsFirst(node), in VisitInt32PairBinop() 954 Emit(kMipsDiv, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitInt32Div() 961 Emit(kMipsDivU, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitUint32Div() 1881 Emit(kMipsFloat64InsertLowWord32, g.DefineSameAsFirst(node), in VisitFloat64InsertLowWord32() 1889 Emit(kMipsFloat64InsertHighWord32, g.DefineSameAsFirst(node), in VisitFloat64InsertHighWord32() 1897 Emit(kMipsFloat64SilenceNaN, g.DefineSameAsFirst(nod in VisitFloat64SilenceNaN() [all...] |
/third_party/node/deps/v8/src/compiler/backend/s390/ |
H A D | instruction-selector-s390.cc | 608 outputs[output_count++] = g.DefineSameAsFirst(node); in VisitUnaryOp() 613 outputs[output_count++] = g.DefineSameAsFirst(node); in VisitUnaryOp() 665 outputs[output_count++] = g.DefineSameAsFirst(node); in VisitBinOp() 670 outputs[output_count++] = g.DefineSameAsFirst(node); in VisitBinOp() 1044 canEliminateZeroExt ? g.DefineSameAsFirst(node) in TryMatchSignExtInt16OrInt8FromWord32Sar() 1052 canEliminateZeroExt ? g.DefineSameAsFirst(node) in TryMatchSignExtInt16OrInt8FromWord32Sar() 1156 canEliminateZeroExt ? g.DefineSameAsFirst(node) in TryMatchNegFromSub() 1183 : g.DefineSameAsFirst(node); in TryMatchShiftFromMul() 2248 outputs[output_count++] = g.DefineSameAsFirst(node); in VisitAtomicCompareExchange() 2678 Emit(kS390_##Opcode, g.DefineSameAsFirst(nod [all...] |
/third_party/node/deps/v8/src/compiler/backend/mips64/ |
H A D | instruction-selector-mips64.cc | 179 opcode, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)), in VisitRRRR() 419 Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(2)), in VisitLoadLane() 646 Emit(kMips64Ins, g.DefineSameAsFirst(node), in VisitWord32And() 682 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(mleft.left().node())); in VisitWord64And() 701 Emit(kMips64Dins, g.DefineSameAsFirst(node), in VisitWord64And() 1107 Emit(kMips64DMulHigh, g.DefineSameAsFirst(node), in VisitInt32Mul() 1168 Emit(kMips64Ddiv, g.DefineSameAsFirst(node), in VisitInt32Div() 1175 Emit(kMips64Div, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitInt32Div() 1182 Emit(kMips64DivU, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitUint32Div() 1197 Emit(kMips64Dmod, g.DefineSameAsFirst(nod in VisitInt32Mod() [all...] |
/third_party/node/deps/v8/src/maglev/ |
H A D | maglev-ir.cc | 69 void DefineSameAsFirst(MaglevVregAllocationState* vreg_state, Node* node) { in DefineSameAsFirst() function 717 DefineSameAsFirst(vreg_state, this); in AllocateVreg() 734 DefineSameAsFirst(vreg_state, this); in AllocateVreg() 761 DefineSameAsFirst(vreg_state, this); in AllocateVreg()
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/third_party/node/deps/v8/src/compiler/backend/loong64/ |
H A D | instruction-selector-loong64.cc | 179 opcode, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)), in VisitRRRR() 630 Emit(kLoong64Bstrins_w, g.DefineSameAsFirst(node), in VisitWord32And() 666 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(mleft.left().node())); in VisitWord64And() 685 Emit(kLoong64Bstrins_d, g.DefineSameAsFirst(node), in VisitWord64And() 1067 Emit(kLoong64Mulh_d, g.DefineSameAsFirst(node), in VisitInt32Mul() 1128 Emit(kLoong64Div_d, g.DefineSameAsFirst(node), in VisitInt32Div() 1135 Emit(kLoong64Div_w, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()), in VisitInt32Div() 1142 Emit(kLoong64Div_wu, g.DefineSameAsFirst(node), in VisitUint32Div() 1157 Emit(kLoong64Mod_d, g.DefineSameAsFirst(node), in VisitInt32Mod() 1178 Emit(kLoong64Div_d, g.DefineSameAsFirst(nod in VisitInt64Div() [all...] |
/third_party/node/deps/v8/src/compiler/backend/arm64/ |
H A D | instruction-selector-arm64.cc | 668 Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(2)), in VisitLoadLane() 3244 Emit(kArm64Bfi, g.DefineSameAsFirst(right), g.UseRegister(right), in VisitFloat64InsertLowWord32() 3250 Emit(kArm64Float64InsertLowWord32, g.DefineSameAsFirst(node), in VisitFloat64InsertLowWord32() 3261 Emit(kArm64Bfi, g.DefineSameAsFirst(left), g.UseRegister(right_of_left), in VisitFloat64InsertHighWord32() 3266 Emit(kArm64Float64InsertHighWord32, g.DefineSameAsFirst(node), in VisitFloat64InsertHighWord32() 3818 g.DefineSameAsFirst(node), g.UseRegister(m.right()), in ShraHelper() 3831 g.DefineSameAsFirst(node), g.UseRegister(m.right()), in AdalpHelper() 3841 selector->Emit(mla_code, g.DefineSameAsFirst(node), g.UseRegister(m.right()), in MlaHelper() 3854 g.DefineSameAsFirst(node), g.UseRegister(m.right()), in SmlalHelper() 3934 g.DefineSameAsFirst(nod [all...] |
/third_party/node/deps/v8/src/compiler/backend/ppc/ |
H A D | instruction-selector-ppc.cc | 135 outputs[output_count++] = g.DefineSameAsFirst(node); in VisitBinop() 824 selector->Emit(opcode2, g.DefineSameAsFirst(node), in VisitPairBinop() 857 Emit(kPPC_Mul32, g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(0)), in VisitInt32PairMul() 1946 Emit(kPPC_DoubleInsertLowWord32, g.DefineSameAsFirst(node), in VisitFloat64InsertLowWord32() 1961 Emit(kPPC_DoubleInsertHighWord32, g.DefineSameAsFirst(node), in VisitFloat64InsertHighWord32() 2414 Emit(kPPC_##Type##ReplaceLane, g.DefineSameAsFirst(node), \ 2469 Emit(kPPC_##Opcode, g.DefineSameAsFirst(node), \ 2625 g.DefineSameAsFirst(node), g.UseRegister(node->InputAt(2)), in VisitLoadLane()
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/third_party/node/deps/v8/src/compiler/backend/ |
H A D | instruction-selector-impl.h | 92 InstructionOperand DefineSameAsFirst(Node* node) { in DefineSameAsFirst() function in v8::internal::compiler::OperandGenerator
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H A D | instruction-selector.cc | 2516 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(node->InputAt(0))); in VisitBitcastWordToTagged() 2905 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(value)); in VisitProjection()
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