Searched refs:DIV_S (Results 1 - 9 of 9) sorted by relevance
| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | instruction-scheduler-riscv64.cc | 530 DIV_S = 17, enumerator
1301 return Latency::DIV_S; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | instruction-scheduler-mips64.cc | 529 DIV_S = 17, enumerator
1500 return Latency::DIV_S; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | instruction-scheduler-mips.cc | 500 DIV_S = 17, enumerator
1792 return Latency::DIV_S; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | constants-mips64.h | 659 DIV_S = ((0U << 3) + 3),
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | constants-mips.h | 613 DIV_S = ((0U << 3) + 3),
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| H A D | assembler-mips.cc | 2601 GenInstrRegister(COP1, S, ft, fs, fd, DIV_S); in div_s()
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| /third_party/pcre2/pcre2/src/sljit/ |
| H A D | sljitNativeMIPS_common.c | 202 #define DIV_S (HI(17) | FMT_S | LO(3)) macro
2799 FAIL_IF(push_inst(compiler, DIV_S | FMT(op) | FT(src2) | FS(src1) | FD(dst_r), MOVABLE_INS)); in sljit_emit_fop2()
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| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 2763 case DIV_S: in DecodeTypeRegisterSRsType()
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| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 3243 case DIV_S: in DecodeTypeRegisterSRsType()
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