Home
last modified time | relevance | path

Searched refs:DIV64 (Results 1 - 4 of 4) sorted by relevance

/third_party/node/deps/v8/src/compiler/backend/riscv64/
H A Dinstruction-scheduler-riscv64.cc440 DIV64 = 50, enumerator
640 int latency = Latency::DIV64 + Latency::MOVF_LOW; in Div64Latency()
672 int latency = Latency::DIV64 + Latency::MOVF_HIGH; in Mod64Latency()
680 int latency = Latency::DIV64 + Latency::MOVF_HIGH; in Modu64Latency()
/third_party/mesa3d/src/compiler/glsl/
H A Dir_optimization.h53 #define DIV64 (1U << 0) macro
H A Dlower_int64.cpp357 if (lowering(DIV64)) { in handle_rvalue()
/third_party/mesa3d/src/mesa/state_tracker/
H A Dst_glsl_to_ir.cpp75 lower_64bit_integer_instructions(ir, DIV64 | MOD64); in link_shader()

Completed in 3 milliseconds