Searched refs:CVT_S_W (Results 1 - 10 of 10) sorted by relevance
| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | instruction-scheduler-riscv64.cc | 471 CVT_S_W = 4, enumerator
979 Latency::MOVF_FREG + Latency::BRANCH + Latency::CVT_S_W + 2 + in Float32RoundLatency()
1365 return Latency::MOVT_FREG + Latency::CVT_S_W; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | instruction-scheduler-mips64.cc | 470 CVT_S_W = 4, enumerator
1127 Latency::MFC1 + Latency::BRANCH + Latency::CVT_S_W + 2 + in Float32RoundLatency()
1561 return Latency::MTC1 + Latency::CVT_S_W; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | instruction-scheduler-mips.cc | 441 CVT_S_W = 4, enumerator
771 Latency::MFC1 + Latency::BRANCH + Latency::CVT_S_W; in Float32RoundLatency()
1790 return Latency::CVT_S_W; in GetInstructionLatency()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 448 expandCvtFPInt(MBB, MI, Mips::CVT_S_W, Mips::MTC1, false); in expandPostRAPseudo()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | constants-mips64.h | 720 CVT_S_W = ((4U << 3) + 0),
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| H A D | assembler-mips64.cc | 3050 GenInstrRegister(COP1, W, f0, fs, fd, CVT_S_W); in cvt_s_w()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | constants-mips.h | 675 CVT_S_W = ((4U << 3) + 0),
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| H A D | assembler-mips.cc | 2843 GenInstrRegister(COP1, W, f0, fs, fd, CVT_S_W); in cvt_s_w()
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| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 3439 case CVT_S_W: // Convert word to float (single). in DecodeTypeRegisterWRsType()
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| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 3082 case CVT_S_W: // Convert word to float (single). in DecodeTypeRegisterWRsType()
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