Searched refs:CVT_S_D (Results 1 - 9 of 9) sorted by relevance
| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | instruction-scheduler-mips.cc | 446 CVT_S_D = 4, enumerator
785 int CvtSUwLatency() { return CvtDUwLatency() + Latency::CVT_S_D; } in CvtSUwLatency()
1776 return Latency::CVT_S_D; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | instruction-scheduler-riscv64.cc | 476 CVT_S_D = 4, enumerator
1359 return Latency::CVT_S_D; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | instruction-scheduler-mips64.cc | 475 CVT_S_D = 4, enumerator
1555 return Latency::CVT_S_D; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | constants-mips64.h | 707 CVT_S_D = ((4U << 3) + 0),
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| H A D | assembler-mips64.cc | 3059 GenInstrRegister(COP1, D, f0, fs, fd, CVT_S_D); in cvt_s_d()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | constants-mips.h | 662 CVT_S_D = ((4U << 3) + 0),
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| H A D | assembler-mips.cc | 2853 GenInstrRegister(COP1, D, f0, fs, fd, CVT_S_D); in cvt_s_d()
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| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 3305 case CVT_S_D: // Convert double to float (single). in DecodeTypeRegisterDRsType()
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| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 2923 case CVT_S_D: // Convert double to float (single). in DecodeTypeRegisterDRsType()
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