Searched refs:CVT_D_W (Results 1 - 9 of 9) sorted by relevance
| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | instruction-scheduler-mips.cc | 443 CVT_D_W = 4, enumerator
780 Mthc1Latency() + Latency::CVT_D_W + Latency::BRANCH + in CvtDUwLatency()
781 Latency::ADD_D + Latency::CVT_D_W; in CvtDUwLatency()
1788 return Latency::CVT_D_W; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | instruction-scheduler-riscv64.cc | 473 CVT_D_W = 4, enumerator
1363 return Latency::MOVT_FREG + Latency::CVT_D_W; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | instruction-scheduler-mips64.cc | 472 CVT_D_W = 4, enumerator
1559 return Latency::MTC1 + Latency::CVT_D_W; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | constants-mips64.h | 721 CVT_D_W = ((4U << 3) + 1),
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| H A D | assembler-mips64.cc | 3063 GenInstrRegister(COP1, W, f0, fs, fd, CVT_D_W); in cvt_d_w()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | constants-mips.h | 676 CVT_D_W = ((4U << 3) + 1),
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| H A D | assembler-mips.cc | 2857 GenInstrRegister(COP1, W, f0, fs, fd, CVT_D_W); in cvt_d_w()
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| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 3443 case CVT_D_W: // Convert word to double. in DecodeTypeRegisterWRsType()
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| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 3086 case CVT_D_W: // Convert word to double. in DecodeTypeRegisterWRsType()
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