/third_party/vixl/benchmarks/aarch64/ |
H A D | bench-utils.cc | 198 __ Bfi(PickR(size), PickR(size), 5, 14); in GenerateTrivialSequence()
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/third_party/node/deps/v8/src/regexp/arm64/ |
H A D | regexp-macro-assembler-arm64.cc | 1632 __ Bfi(cached_register, source.X(), 0, kWRegSizeInBits); in StoreRegister() 1638 __ Bfi(cached_register, source.X(), kWRegSizeInBits, kWRegSizeInBits); in StoreRegister()
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/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | macro-assembler-arm64-inl.h | 298 void TurboAssembler::Bfi(const Register& rd, const Register& rn, unsigned lsb, in Bfi() function in v8::internal::TurboAssembler
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H A D | macro-assembler-arm64.h | 1128 inline void Bfi(const Register& rd, const Register& rn, unsigned lsb,
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/third_party/vixl/test/aarch32/ |
H A D | test-assembler-aarch32.cc | 942 __ Bfi(r2, r1, 0, 8); in TEST() 943 __ Bfi(r2, r1, 16, 16); in TEST()
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/third_party/vixl/test/aarch64/ |
H A D | test-assembler-fp-aarch64.cc | 4633 __ Bfi(x11, x10, 0, kWRegSize); 4788 __ Bfi(x11, x10, 0, kWRegSize);
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H A D | test-assembler-aarch64.cc | 6793 __ Bfi(x12, x1, 16, 8); 14218 __ Bfi(x0, x4, 56, 4); // Tag dst_addr so set region can be loaded.
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/third_party/node/deps/v8/src/compiler/backend/arm64/ |
H A D | code-generator-arm64.cc | 1481 __ Bfi(i.OutputRegister(), i.InputRegister(1), i.InputInt6(2), in AssembleArchInstruction()
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/third_party/vixl/src/aarch32/ |
H A D | macro-assembler-aarch32.h | 1505 void Bfi( in MacroAssembler() function in vixl::aarch32::MacroAssembler 1519 void Bfi(Register rd, Register rn, uint32_t lsb, uint32_t width) { in MacroAssembler() function in vixl::aarch32::MacroAssembler 1520 Bfi(al, rd, rn, lsb, width); in MacroAssembler()
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/third_party/vixl/src/aarch64/ |
H A D | macro-assembler-aarch64.h | 1186 void Bfi(const Register& rd, in Bfi() function in vixl::aarch64::MacroAssembler
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