/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/Disassembler/ |
H A D | BPFDisassembler.cpp | 1 //===- BPFDisassembler.cpp - Disassembler for BPF ---------------*- C++ -*-===// 9 // This file is part of the BPF Disassembler. 33 /// A disassembler class for BPF. 97 BPF::R0, BPF::R1, BPF::R2, BPF::R3, BPF::R4, BPF::R5, 98 BPF [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
H A D | BPFMISimplifyPatchable.cpp | 27 #include "BPF.h" 85 LLVM_DEBUG(dbgs() << "*** BPF simplify patchable insts pass ***\n\n"); in initialize() 108 if (Opcode == BPF::LDB || Opcode == BPF::LDH || Opcode == BPF::LDW || in checkADDrr() 109 Opcode == BPF::LDD || Opcode == BPF::STB || Opcode == BPF::STH || in checkADDrr() 110 Opcode == BPF::STW || Opcode == BPF in checkADDrr() [all...] |
H A D | BPFInstrInfo.cpp | 1 //===-- BPFInstrInfo.cpp - BPF Instruction Information ----------*- C++ -*-===// 9 // This file contains the BPF implementation of the TargetInstrInfo class. 14 #include "BPF.h" 29 : BPFGenInstrInfo(BPF::ADJCALLSTACKDOWN, BPF::ADJCALLSTACKUP) {} in BPFInstrInfo() 35 if (BPF::GPRRegClass.contains(DestReg, SrcReg)) in copyPhysReg() 36 BuildMI(MBB, I, DL, get(BPF::MOV_rr), DestReg) in copyPhysReg() 38 else if (BPF::GPR32RegClass.contains(DestReg, SrcReg)) in copyPhysReg() 39 BuildMI(MBB, I, DL, get(BPF::MOV_rr_32), DestReg) in copyPhysReg() 57 LdOpc = BPF in expandMEMCPY() [all...] |
H A D | BPFMIPeephole.cpp | 23 #include "BPF.h" 80 LLVM_DEBUG(dbgs() << "*** BPF MachineSSA ZEXT Elim peephole pass ***\n\n"); in initialize() 97 if (MRI->getRegClass(Reg) == &BPF::GPRRegClass) in isCopyFrom32Def() 125 if (PhiDef->getOpcode() == BPF::COPY && !isCopyFrom32Def(PhiDef)) in isPhiFrom32Def() 144 } else if (DefInsn->getOpcode() == BPF::COPY) { in isInsnFrom32Def() 185 if (MI.getOpcode() == BPF::SRL_ri && in eliminateZExtSeq() 196 SllMI->getOpcode() != BPF::SLL_ri || in eliminateZExtSeq() 206 MovMI->getOpcode() != BPF::MOV_32_64) in eliminateZExtSeq() 219 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(BPF::SUBREG_TO_REG), DstReg) in eliminateZExtSeq() 220 .addImm(0).addReg(SubReg).addImm(BPF in eliminateZExtSeq() [all...] |
H A D | BPFRegisterInfo.cpp | 1 //===-- BPFRegisterInfo.cpp - BPF Register Information ----------*- C++ -*-===// 9 // This file contains the BPF implementation of the TargetRegisterInfo class. 14 #include "BPF.h" 30 : BPFGenRegisterInfo(BPF::R0) {} in BPFRegisterInfo() 39 markSuperRegs(Reserved, BPF::W10); // [W|R]10 is read only frame pointer in getReservedRegs() 40 markSuperRegs(Reserved, BPF::W11); // [W|R]11 is pseudo stack pointer in getReservedRegs() 49 "Looks like the BPF stack limit of 512 bytes is exceeded. " in WarnSize() 50 "Please move large on stack variables into BPF per-cpu array map.\n", in WarnSize() 84 if (MI.getOpcode() == BPF::MOV_rr) { in eliminateFrameIndex() 90 BuildMI(MBB, ++II, DL, TII.get(BPF in eliminateFrameIndex() [all...] |
H A D | BPFISelLowering.cpp | 1 //===-- BPFISelLowering.cpp - BPF DAG Lowering Implementation ------------===// 9 // This file defines the interfaces that BPF uses to lower LLVM code into a 15 #include "BPF.h" 62 addRegisterClass(MVT::i64, &BPF::GPRRegClass); in BPFTargetLowering() 64 addRegisterClass(MVT::i32, &BPF::GPR32RegClass); in BPFTargetLowering() 69 setStackPointerRegisterToSaveRestore(BPF::R11); in BPFTargetLowering() 182 return std::make_pair(0U, &BPF::GPRRegClass); in getRegForInlineAsmConstraint() 240 SimpleTy == MVT::i64 ? &BPF::GPRRegClass : &BPF::GPR32RegClass); in LowerFormalArguments() 288 // BPF targe in LowerCall() [all...] |
H A D | BPFFrameLowering.cpp | 1 //===-- BPFFrameLowering.cpp - BPF Frame Information ----------------------===// 9 // This file contains the BPF implementation of TargetFrameLowering class. 35 SavedRegs.reset(BPF::R6); in determineCalleeSaves() 36 SavedRegs.reset(BPF::R7); in determineCalleeSaves() 37 SavedRegs.reset(BPF::R8); in determineCalleeSaves() 38 SavedRegs.reset(BPF::R9); in determineCalleeSaves()
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H A D | BPFMIChecking.cpp | 17 #include "BPF.h" 62 LLVM_DEBUG(dbgs() << "*** BPF PreEmit checking pass ***\n\n"); in initialize() 68 // NOTE: BPF backend hasn't enabled sub-register liveness track, so when the 74 // on BPF backend, then allDefsAreDead could work on GPR32 Def. This requires 75 // implementing TargetSubtargetInfo::enableSubRegLiveness on BPF. 83 // For BPF, each 64-bit register could only have one 32-bit sub-register. This 94 // Hence, for BPF, we enhance MachineInstr::allDefsAreDead. Given the solo 108 &BPFMCRegisterClasses[BPF::GPRRegClassID]; in hasLiveDefs() 159 if (MI.getOpcode() != BPF::XADDW && in checkingIllegalXADD() 160 MI.getOpcode() != BPF in checkingIllegalXADD() [all...] |
H A D | BTFDebug.cpp | 14 #include "BPF.h" 999 if (MI->getOpcode() == BPF::LD_imm64) { in beginInstruction() 1012 } else if (MI->getOpcode() == BPF::CORE_MEM || in beginInstruction() 1013 MI->getOpcode() == BPF::CORE_ALU32_MEM || in beginInstruction() 1014 MI->getOpcode() == BPF::CORE_SHIFT) { in beginInstruction() 1017 } else if (MI->getOpcode() == BPF::JAL) { in beginInstruction() 1136 if (MI->getOpcode() == BPF::LD_imm64) { in InstLower() 1144 OutMI.setOpcode(BPF::MOV_ri); in InstLower() 1150 } else if (MI->getOpcode() == BPF::CORE_MEM || in InstLower() 1151 MI->getOpcode() == BPF in InstLower() [all...] |
H A D | BPFISelDAGToDAG.cpp | 1 //===-- BPFISelDAGToDAG.cpp - A dag to dag inst selector for BPF ----------===// 9 // This file defines a DAG pattern matching instruction selector for BPF, 10 // converting from a legalized dag to a BPF dag. 14 #include "BPF.h" 52 return "BPF DAG->DAG Pattern Instruction Selection"; 99 // ComplexPattern used on BPF Load/Store instructions 135 // ComplexPattern used on BPF FI instruction 217 SDValue R6Reg = CurDAG->getRegister(BPF::R6, MVT::i64); in Select() 230 unsigned Opc = BPF::MOV_rr; in Select()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/MCTargetDesc/ |
H A D | BPFMCCodeEmitter.cpp | 1 //===-- BPFMCCodeEmitter.cpp - Convert BPF code to machine code -----------===// 101 if (MI.getOpcode() == BPF::JAL) in getMachineOpValue() 104 else if (MI.getOpcode() == BPF::LD_imm64) in getMachineOpValue() 128 if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) { in encodeInstruction() 157 // Encode BPF Memory Operand
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H A D | BPFMCTargetDesc.cpp | 1 //===-- BPFMCTargetDesc.cpp - BPF Target Descriptions ---------------------===// 9 // This file provides BPF specific target descriptions. 43 InitBPFMCRegisterInfo(X, BPF::R11 /* RAReg doesn't exist */); in createBPFMCRegisterInfo()
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/third_party/libbpf/scripts/ |
H A D | sync-kernel.sh | 7 echo "Set BPF_BASELINE to override bpf tree commit, otherwise read from <libbpf-repo>/BPF-CHECKPOINT-COMMIT." 18 BPF_BASELINE_COMMIT=${BPF_BASELINE:-$(cat ${LIBBPF_REPO}/BPF-CHECKPOINT-COMMIT)} 227 echo "BPF BASE COMMIT: '$(commit_desc ${BPF_BASELINE_COMMIT})'" 228 echo "BPF TIP COMMIT: '$(commit_desc ${BPF_TIP_COMMIT})'" 232 echo "BPF BASELINE TAG: ${BPF_BASELINE_TAG}" 233 echo "BPF TIP TAG: ${BPF_TIP_TAG}" 292 git commit -s -m "sync: auto-generate latest BPF helpers 294 Latest changes to BPF helper definitions. 302 echo ${BPF_TIP_COMMIT} > BPF-CHECKPOINT-COMMIT && \ 304 git add BPF [all...] |
/third_party/python/Lib/ |
H A D | random.py | 98 BPF = 53 # Number of bits in a float variable 99 RECIP_BPF = 2 ** -BPF 245 def _randbelow_without_getrandbits(self, n, maxsize=1<<BPF):
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/third_party/python/Lib/test/ |
H A D | test_random.py | 836 maxsize = 1<<random.BPF
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