Searched refs:AddrMode2 (Results 1 - 6 of 6) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMBaseInfo.h | 188 AddrMode2 = 2, enumerator
214 case AddrMode2: return "AddrMode2"; in AddrModeToString()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 520 case ARMII::AddrMode2: in getFrameIndexInstrOffset()
717 case ARMII::AddrMode2: in isFrameOffsetLegal()
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| H A D | ARMBaseInstrInfo.cpp | 182 case ARMII::AddrMode2: { in convertToThreeAddress()
2525 // Memory operands in inline assembly always use AddrMode2. in rewriteARMFrameIndex()
2527 AddrMode = ARMII::AddrMode2; in rewriteARMFrameIndex()
2576 case ARMII::AddrMode2: in rewriteARMFrameIndex()
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| H A D | ARMFrameLowering.cpp | 1540 case ARMII::AddrMode2: in estimateRSStackSizeLimit()
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.cc | 1323 void Assembler::AddrMode2(Instr instr, Register rd, const MemOperand& x) { in AddrMode2() function in v8::internal::Assembler
1347 AddrMode2(instr, rd, MemOperand(x.rn_, scratch, x.am_)); in AddrMode2()
1436 // Post-indexed addressing requires W == 1; different than in AddrMode2/3. in AddrMode5()
2091 AddrMode2(cond | B26 | L, dst, src); in ldr()
2095 AddrMode2(cond | B26, src, dst); in str()
2099 AddrMode2(cond | B26 | B | L, dst, src); in ldrb()
2103 AddrMode2(cond | B26 | B, src, dst); in strb()
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| H A D | assembler-arm.h | 1333 void AddrMode2(Instr instr, Register rd, const MemOperand& x);
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