| /third_party/FreeBSD/sys/arm/arm/ |
| H A D | in_cksum.c | 48 #define ADDCARRY(x) (x > 65535 ? x -= 65535 : x) macro
59 ADDCARRY(sum); \
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 221 /// FIXME: These nodes are deprecated in favor of ADDCARRY and SUBCARRY.
223 /// toward the use of ADDCARRY/SUBCARRY and will eventually be removed.
243 ADDCARRY, SUBCARRY, enumerator
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.h | 99 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY,
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| H A D | SystemZISelLowering.cpp | 182 setOperationAction(ISD::ADDCARRY, VT, Custom); in SystemZTargetLowering()
3639 while (Carry.getOpcode() == ISD::ADDCARRY) in isAddCarryChain()
3650 // Lower ADDCARRY/SUBCARRY nodes.
3671 case ISD::ADDCARRY: in lowerADDSUBCARRY()
3675 BaseOp = SystemZISD::ADDCARRY; in lowerADDSUBCARRY()
5140 case ISD::ADDCARRY:
5327 OPCODE(ADDCARRY); in getTargetNodeName()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 291 case ISD::ADDCARRY: return "addcarry"; in getOperationName()
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| H A D | LegalizeIntegerTypes.cpp | 150 case ISD::ADDCARRY: in PromoteIntegerResult()
1089 // Handle promotion for the ADDE/SUBE/ADDCARRY/SUBCARRY nodes. Notice that
1091 // the ADDCARRY/SUBCARRY nodes in that the third operand is carry Boolean.
1099 // An ADDCARRY can generate carry only if any of the operands has its in PromoteIntRes_ADDSUBCARRY()
1296 case ISD::ADDCARRY: in PromoteIntegerOperand()
1892 case ISD::ADDCARRY: in ExpandIntegerResult()
2265 N->getOpcode() == ISD::ADD ? ISD::ADDCARRY : ISD::SUBCARRY, in ExpandIntRes_ADDSUB()
2272 Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
2437 CarryOp = ISD::ADDCARRY; in ExpandIntRes_UADDSUBO()
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| H A D | DAGCombiner.cpp | 1514 case ISD::ADDCARRY: return visitADDCARRY(N); in visit()
2389 if (V.getOpcode() != ISD::ADDCARRY && V.getOpcode() != ISD::SUBCARRY && in getAsCarry()
2490 if (N1.getOpcode() == ISD::ADDCARRY && isNullConstant(N1.getOperand(1)) && in visitADDLikeCommutative()
2492 return DAG.getNode(ISD::ADDCARRY, DL, N1->getVTList(), in visitADDLikeCommutative()
2496 if (TLI.isOperationLegalOrCustom(ISD::ADDCARRY, VT)) in visitADDLikeCommutative()
2498 return DAG.getNode(ISD::ADDCARRY, DL, in visitADDLikeCommutative()
2649 if (N1.getOpcode() == ISD::ADDCARRY && isNullConstant(N1.getOperand(1))) { in visitUADDOLike()
2653 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), N->getVTList(), N0, Y, in visitUADDOLike()
2658 if (TLI.isOperationLegalOrCustom(ISD::ADDCARRY, VT)) in visitUADDOLike()
2660 return DAG.getNode(ISD::ADDCARRY, SDLo in visitUADDOLike()
[all...] |
| H A D | TargetLowering.cpp | 5881 Next = DAG.getNode(ISD::ADDCARRY, dl, DAG.getVTList(VT, BoolType), Next,
5895 Hi = DAG.getNode(ISD::ADDCARRY, dl, DAG.getVTList(HiLoVT, BoolType), Hi,
7400 unsigned OpcCarry = IsAdd ? ISD::ADDCARRY : ISD::SUBCARRY;
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| H A D | LegalizeDAG.cpp | 3440 case ISD::ADDCARRY:
3446 bool IsAdd = Node->getOpcode() == ISD::ADDCARRY;
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| H A D | SelectionDAG.cpp | 3148 case ISD::ADDCARRY:
3163 // With ADDE and ADDCARRY, a carry bit may be added in.
3168 else if (Opcode == ISD::ADDCARRY)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1400 setOperationAction(ISD::ADDCARRY, VT, Expand); in HexagonTargetLowering()
1403 setOperationAction(ISD::ADDCARRY, MVT::i64, Custom); in HexagonTargetLowering()
2842 if (Opc == ISD::ADDCARRY) in LowerAddSubCarry()
2915 case ISD::ADDCARRY: in LowerOperation()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 247 setOperationAction(ISD::ADDCARRY, MVT::i32, Legal); in SITargetLowering()
255 setOperationAction(ISD::ADDCARRY, MVT::i64, Legal); in SITargetLowering()
717 setTargetDAGCombine(ISD::ADDCARRY); in SITargetLowering()
9557 Opc == ISD::ANY_EXTEND || Opc == ISD::ADDCARRY) in performAddCombine()
9573 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::SUBCARRY : ISD::ADDCARRY; in performAddCombine()
9576 case ISD::ADDCARRY: { in performAddCombine()
9581 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), RHS->getVTList(), Args); in performAddCombine()
9614 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::ADDCARRY : ISD::SUBCARRY; in performSubCombine()
9647 if ((LHSOpc == ISD::ADD && Opc == ISD::ADDCARRY) || in performAddCarrySubCarryCombine()
9994 case ISD::ADDCARRY in PerformDAGCombine()
[all...] |
| H A D | AMDGPUISelLowering.cpp | 1712 SDValue Add1_Lo = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Rcp_Lo, in LowerUDIVREM64()
1714 SDValue Add1_Hi = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Rcp_Hi, in LowerUDIVREM64()
1727 SDValue Add2_Lo = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add1_Lo, in LowerUDIVREM64()
1729 SDValue Add2_HiC = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add1_HiNc, in LowerUDIVREM64()
1731 SDValue Add2_Hi = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add2_HiC, in LowerUDIVREM64()
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| H A D | AMDGPUISelDAGToDAG.cpp | 767 case ISD::ADDCARRY: in Select()
1066 unsigned Opc = N->getOpcode() == ISD::ADDCARRY ? AMDGPU::V_ADDC_U32_e64 in SelectAddcSubb()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 672 // ADDCARRY operations default to expand in initActions()
673 setOperationAction(ISD::ADDCARRY, VT, Expand); in initActions()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1045 setOperationAction(ISD::ADDCARRY, MVT::i32, Custom); in ARMTargetLowering()
8835 if (Op.getOpcode() == ISD::ADDCARRY) { in LowerADDSUBCARRY()
9349 case ISD::ADDCARRY: in LowerOperation()
14520 // (ADDCARRY (SUB x, y), t:0, t:1) in PerformCMOVCombine()
14526 // The final ADDCARRY computes in PerformCMOVCombine()
14536 Res = DAG.getNode(ISD::ADDCARRY, dl, VTs, Sub, Neg, Carry); in PerformCMOVCombine()
16471 if (!isOperationLegalOrCustom(ISD::ADDCARRY, HalfT) || in lowerABS()
16487 Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, Tmp, Hi, in lowerABS()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 609 case ISD::ADDCARRY: in IsProfitableToFold()
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| H A D | X86ISelLowering.cpp | 1935 setOperationAction(ISD::ADDCARRY, VT, Custom); in X86TargetLowering()
[all...] |