Searched refs:ABS_D (Results 1 - 9 of 9) sorted by relevance
| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | instruction-scheduler-riscv64.cc | 445 ABS_D = 4, enumerator
1329 return Latency::ABS_D; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | instruction-scheduler-mips64.cc | 444 ABS_D = 4, enumerator
1525 return Latency::ABS_D; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| H A D | instruction-scheduler-mips.cc | 417 ABS_D = 4, enumerator
1774 return Latency::ABS_D; in GetInstructionLatency()
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | constants-mips64.h | 687 ABS_D = ((0U << 3) + 5),
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| H A D | assembler-mips64.cc | 2884 GenInstrRegister(COP1, S, f0, fs, fd, ABS_D); in abs_s()
2888 GenInstrRegister(COP1, D, f0, fs, fd, ABS_D); in abs_d()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | constants-mips.h | 642 ABS_D = ((0U << 3) + 5),
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| H A D | assembler-mips.cc | 2613 GenInstrRegister(COP1, D, f0, fs, fd, ABS_D); in abs_d()
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| /third_party/node/deps/v8/src/execution/mips64/ |
| H A D | simulator-mips64.cc | 3199 case ABS_D: in DecodeTypeRegisterDRsType()
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| /third_party/node/deps/v8/src/execution/mips/ |
| H A D | simulator-mips.cc | 2818 case ABS_D: in DecodeTypeRegisterDRsType()
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