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Searched refs:vtaps (Results 1 - 25 of 47) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_dpp_dscl.c468 bool dpp1_dscl_is_lb_conf_valid(int ceil_vratio, int num_partitions, int vtaps) in dpp1_dscl_is_lb_conf_valid() argument
471 return vtaps <= (num_partitions - ceil_vratio + 2); in dpp1_dscl_is_lb_conf_valid()
473 return vtaps <= num_partitions; in dpp1_dscl_is_lb_conf_valid()
481 int vtaps = scl_data->taps.v_taps; in dpp1_dscl_find_lb_memory_config() local
496 if (dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps) in dpp1_dscl_find_lb_memory_config()
503 if (dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps) in dpp1_dscl_find_lb_memory_config()
512 if (dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps) in dpp1_dscl_find_lb_memory_config()
520 /*Ensure we can support the requested number of vtaps*/ in dpp1_dscl_find_lb_memory_config()
521 ASSERT(dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps) in dpp1_dscl_find_lb_memory_config()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_dpp_dscl.c450 bool dpp1_dscl_is_lb_conf_valid(int ceil_vratio, int num_partitions, int vtaps) in dpp1_dscl_is_lb_conf_valid() argument
453 return vtaps <= (num_partitions - ceil_vratio + 2); in dpp1_dscl_is_lb_conf_valid()
455 return vtaps <= num_partitions; in dpp1_dscl_is_lb_conf_valid()
463 int vtaps = scl_data->taps.v_taps; in dpp1_dscl_find_lb_memory_config() local
478 if (dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps) in dpp1_dscl_find_lb_memory_config()
485 if (dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps) in dpp1_dscl_find_lb_memory_config()
494 if (dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps) in dpp1_dscl_find_lb_memory_config()
502 /*Ensure we can support the requested number of vtaps*/ in dpp1_dscl_find_lb_memory_config()
503 ASSERT(dpp1_dscl_is_lb_conf_valid(ceil_vratio, num_part_y, vtaps) in dpp1_dscl_find_lb_memory_config()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c163 double vtaps,
321 unsigned int vtaps[],
1209 double vtaps, in CalculatePrefetchSourceLines()
1220 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1); in CalculatePrefetchSourceLines()
1222 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
1515 mode_lib->vba.vtaps[k] / 6.0 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1525 if ((mode_lib->vba.htaps[k] > 6 || mode_lib->vba.vtaps[k] > 6) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1862 mode_lib->vba.vtaps[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2447 mode_lib->vba.vtaps, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3415 || mode_lib->vba.vtaps[ in dml21_ModeSupportAndSystemConfigurationFull()
1206 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) CalculatePrefetchSourceLines() argument
5225 CalculateWatermarksAndDRAMSpeedChangeSupport( struct display_mode_lib *mode_lib, unsigned int PrefetchMode, unsigned int NumberOfActivePlanes, unsigned int MaxLineBufferLines, unsigned int LineBufferSize, unsigned int DPPOutputBufferPixels, double DETBufferSizeInKByte, unsigned int WritebackInterfaceLumaBufferSize, unsigned int WritebackInterfaceChromaBufferSize, double DCFCLK, double UrgentOutOfOrderReturn, double ReturnBW, bool GPUVMEnable, int dpte_group_bytes[], unsigned int MetaChunkSize, double UrgentLatency, double ExtraLatency, double WritebackLatency, double WritebackChunkSize, double SOCCLK, double DRAMClockChangeLatency, double SRExitTime, double SREnterPlusExitTime, double DCFCLKDeepSleep, int DPPPerPlane[], bool DCCEnable[], double DPPCLK[], double SwathWidthSingleDPPY[], unsigned int SwathHeightY[], double ReadBandwidthPlaneLuma[], unsigned int SwathHeightC[], double ReadBandwidthPlaneChroma[], unsigned int LBBitPerPixel[], double SwathWidthY[], double HRatio[], unsigned int vtaps[], unsigned int VTAPsChroma[], double VRatio[], unsigned int HTotal[], double PixelClock[], unsigned int BlendingAndTiming[], double BytePerPixelDETY[], double BytePerPixelDETC[], bool WritebackEnable[], enum source_format_class WritebackPixelFormat[], double WritebackDestinationWidth[], double WritebackDestinationHeight[], double WritebackSourceHeight[], enum clock_change_support *DRAMClockChangeSupport, double *UrgentWatermark, double *WritebackUrgentWatermark, double *DRAMClockChangeWatermark, double *WritebackDRAMClockChangeWatermark, double *StutterExitWatermark, double *StutterEnterPlusExitWatermark, double *MinActiveDRAMClockChangeLatencySupported) CalculateWatermarksAndDRAMSpeedChangeSupport() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c163 double vtaps,
321 unsigned int vtaps[],
1214 double vtaps, in CalculatePrefetchSourceLines()
1225 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1); in CalculatePrefetchSourceLines()
1227 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
1520 mode_lib->vba.vtaps[k] / 6.0 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1530 if ((mode_lib->vba.htaps[k] > 6 || mode_lib->vba.vtaps[k] > 6) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1867 mode_lib->vba.vtaps[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2453 mode_lib->vba.vtaps, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3542 || mode_lib->vba.vtaps[ in dml21_ModeSupportAndSystemConfigurationFull()
1211 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) CalculatePrefetchSourceLines() argument
5242 CalculateWatermarksAndDRAMSpeedChangeSupport( struct display_mode_lib *mode_lib, unsigned int PrefetchMode, unsigned int NumberOfActivePlanes, unsigned int MaxLineBufferLines, unsigned int LineBufferSize, unsigned int DPPOutputBufferPixels, unsigned int DETBufferSizeInKByte, unsigned int WritebackInterfaceLumaBufferSize, unsigned int WritebackInterfaceChromaBufferSize, double DCFCLK, double UrgentOutOfOrderReturn, double ReturnBW, bool GPUVMEnable, int dpte_group_bytes[], unsigned int MetaChunkSize, double UrgentLatency, double ExtraLatency, double WritebackLatency, double WritebackChunkSize, double SOCCLK, double DRAMClockChangeLatency, double SRExitTime, double SREnterPlusExitTime, double DCFCLKDeepSleep, int DPPPerPlane[], bool DCCEnable[], double DPPCLK[], double SwathWidthSingleDPPY[], unsigned int SwathHeightY[], double ReadBandwidthPlaneLuma[], unsigned int SwathHeightC[], double ReadBandwidthPlaneChroma[], unsigned int LBBitPerPixel[], double SwathWidthY[], double HRatio[], unsigned int vtaps[], unsigned int VTAPsChroma[], double VRatio[], unsigned int HTotal[], double PixelClock[], unsigned int BlendingAndTiming[], double BytePerPixelDETY[], double BytePerPixelDETC[], bool WritebackEnable[], enum source_format_class WritebackPixelFormat[], double WritebackDestinationWidth[], double WritebackDestinationHeight[], double WritebackSourceHeight[], enum clock_change_support *DRAMClockChangeSupport, double *UrgentWatermark, double *WritebackUrgentWatermark, double *DRAMClockChangeWatermark, double *WritebackDRAMClockChangeWatermark, double *StutterExitWatermark, double *StutterEnterPlusExitWatermark, double *MinActiveDRAMClockChangeLatencySupported) CalculateWatermarksAndDRAMSpeedChangeSupport() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c176 double vtaps,
331 unsigned int vtaps[],
1682 double vtaps, in CalculatePrefetchSourceLines()
1693 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1); in CalculatePrefetchSourceLines()
1695 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
1980 * dml_max(v->vtaps[k] / 6.0 * dml_min(1.0, v->HRatio[k]), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1983 if ((v->htaps[k] > 6 || v->vtaps[k] > 6) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2360 v->vtaps[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2843 v->vtaps, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3676 || v->vtaps[ in dml30_ModeSupportAndSystemConfigurationFull()
1679 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) CalculatePrefetchSourceLines() argument
5346 CalculateWatermarksAndDRAMSpeedChangeSupport( struct display_mode_lib *mode_lib, unsigned int PrefetchMode, unsigned int NumberOfActivePlanes, unsigned int MaxLineBufferLines, unsigned int LineBufferSize, unsigned int DPPOutputBufferPixels, double DETBufferSizeInKByte, unsigned int WritebackInterfaceBufferSize, double DCFCLK, double ReturnBW, bool GPUVMEnable, unsigned int dpte_group_bytes[], unsigned int MetaChunkSize, double UrgentLatency, double ExtraLatency, double WritebackLatency, double WritebackChunkSize, double SOCCLK, double DRAMClockChangeLatency, double SRExitTime, double SREnterPlusExitTime, double DCFCLKDeepSleep, unsigned int DPPPerPlane[], bool DCCEnable[], double DPPCLK[], double DETBufferSizeY[], double DETBufferSizeC[], unsigned int SwathHeightY[], unsigned int SwathHeightC[], unsigned int LBBitPerPixel[], double SwathWidthY[], double SwathWidthC[], double HRatio[], double HRatioChroma[], unsigned int vtaps[], unsigned int VTAPsChroma[], double VRatio[], double VRatioChroma[], unsigned int HTotal[], double PixelClock[], unsigned int BlendingAndTiming[], double BytePerPixelDETY[], double BytePerPixelDETC[], double DSTXAfterScaler[], double DSTYAfterScaler[], bool WritebackEnable[], enum source_format_class WritebackPixelFormat[], double WritebackDestinationWidth[], double WritebackDestinationHeight[], double WritebackSourceHeight[], enum clock_change_support *DRAMClockChangeSupport, double *UrgentWatermark, double *WritebackUrgentWatermark, double *DRAMClockChangeWatermark, double *WritebackDRAMClockChangeWatermark, double *StutterExitWatermark, double *StutterEnterPlusExitWatermark, double *MinActiveDRAMClockChangeLatencySupported) CalculateWatermarksAndDRAMSpeedChangeSupport() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c174 double vtaps,
329 unsigned int vtaps[],
1613 double vtaps, in CalculatePrefetchSourceLines()
1624 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1); in CalculatePrefetchSourceLines()
1626 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
1911 * dml_max(v->vtaps[k] / 6.0 * dml_min(1.0, v->HRatio[k]), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1914 if ((v->htaps[k] > 6 || v->vtaps[k] > 6) in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2291 v->vtaps[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2776 v->vtaps, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3575 || v->vtaps[ in dml30_ModeSupportAndSystemConfigurationFull()
1610 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) CalculatePrefetchSourceLines() argument
5186 CalculateWatermarksAndDRAMSpeedChangeSupport( struct display_mode_lib *mode_lib, unsigned int PrefetchMode, unsigned int NumberOfActivePlanes, unsigned int MaxLineBufferLines, unsigned int LineBufferSize, unsigned int DPPOutputBufferPixels, unsigned int DETBufferSizeInKByte, unsigned int WritebackInterfaceBufferSize, double DCFCLK, double ReturnBW, bool GPUVMEnable, unsigned int dpte_group_bytes[], unsigned int MetaChunkSize, double UrgentLatency, double ExtraLatency, double WritebackLatency, double WritebackChunkSize, double SOCCLK, double DRAMClockChangeLatency, double SRExitTime, double SREnterPlusExitTime, double DCFCLKDeepSleep, unsigned int DPPPerPlane[], bool DCCEnable[], double DPPCLK[], unsigned int DETBufferSizeY[], unsigned int DETBufferSizeC[], unsigned int SwathHeightY[], unsigned int SwathHeightC[], unsigned int LBBitPerPixel[], double SwathWidthY[], double SwathWidthC[], double HRatio[], double HRatioChroma[], unsigned int vtaps[], unsigned int VTAPsChroma[], double VRatio[], double VRatioChroma[], unsigned int HTotal[], double PixelClock[], unsigned int BlendingAndTiming[], double BytePerPixelDETY[], double BytePerPixelDETC[], double DSTXAfterScaler[], double DSTYAfterScaler[], bool WritebackEnable[], enum source_format_class WritebackPixelFormat[], double WritebackDestinationWidth[], double WritebackDestinationHeight[], double WritebackSourceHeight[], enum clock_change_support *DRAMClockChangeSupport, double *UrgentWatermark, double *WritebackUrgentWatermark, double *DRAMClockChangeWatermark, double *WritebackDRAMClockChangeWatermark, double *StutterExitWatermark, double *StutterEnterPlusExitWatermark, double *MinActiveDRAMClockChangeLatencySupported) CalculateWatermarksAndDRAMSpeedChangeSupport() argument
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/calcs/
H A Ddcn_calc_auto.c99 v->vtaps[k] = v->override_vta_ps[k]; in scaler_settings_calculation()
102 v->vtaps[k] = v->acceptable_quality_vta_ps; in scaler_settings_calculation()
132 if (v->h_ratio[k] > v->max_hscl_ratio || v->v_ratio[k] > v->max_vscl_ratio || v->h_ratio[k] > v->htaps[k] || v->v_ratio[k] > v->vtaps[k] || (v->source_pixel_format[k] != dcn_bw_rgb_sub_64 && v->source_pixel_format[k] != dcn_bw_rgb_sub_32 && v->source_pixel_format[k] != dcn_bw_rgb_sub_16 && (v->h_ratio[k] / 2.0 > v->hta_pschroma[k] || v->v_ratio[k] / 2.0 > v->vta_pschroma[k]))) { in mode_support_and_system_configuration()
331 v->min_dppclk_using_single_dpp[k] = v->pixel_clock[k] *dcn_bw_max3(v->vtaps[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k]), v->h_ratio[k] * v->v_ratio[k] / v->pscl_factor[k], 1.0); in mode_support_and_system_configuration()
340 v->min_dppclk_using_single_dpp[k] = v->pixel_clock[k] *dcn_bw_max5(v->vtaps[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k]), v->h_ratio[k] * v->v_ratio[k] / v->pscl_factor[k], v->vta_pschroma[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k] / 2.0), v->h_ratio[k] * v->v_ratio[k] / 4.0 / v->pscl_factor_chroma[k], 1.0); in mode_support_and_system_configuration()
427 v->number_of_dpp_required_for_lb_size =dcn_bw_ceil2((v->vtaps[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k], 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] /dcn_bw_max2(v->h_ratio[k], 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0); in mode_support_and_system_configuration()
430 v->number_of_dpp_required_for_lb_size =dcn_bw_max2(dcn_bw_ceil2((v->vtaps[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k], 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] /dcn_bw_max2(v->h_ratio[k], 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0),dcn_bw_ceil2((v->vta_pschroma[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k] / 2.0, 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0)); in mode_support_and_system_configuration()
554 v->effective_lb_latency_hiding_source_lines_luma =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_yper_state[i][j][k] /dcn_bw_max2(v->h_ratio[k], 1.0)), 1.0)) - (v->vtaps[k] - 1.0); in mode_support_and_system_configuration()
747 v->v_init_y = (v->v_ratio[k] + v->vtaps[k] + 1.0 + v->interlace_output[k] * 0.5 * v->v_ratio[k]) / 2.0; in mode_support_and_system_configuration()
759 v->v_init_c = (v->v_ratio[k] / 2.0 + v->vtaps[ in mode_support_and_system_configuration()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calc_auto.c99 v->vtaps[k] = v->override_vta_ps[k]; in scaler_settings_calculation()
102 v->vtaps[k] = v->acceptable_quality_vta_ps; in scaler_settings_calculation()
132 if (v->h_ratio[k] > v->max_hscl_ratio || v->v_ratio[k] > v->max_vscl_ratio || v->h_ratio[k] > v->htaps[k] || v->v_ratio[k] > v->vtaps[k] || (v->source_pixel_format[k] != dcn_bw_rgb_sub_64 && v->source_pixel_format[k] != dcn_bw_rgb_sub_32 && v->source_pixel_format[k] != dcn_bw_rgb_sub_16 && (v->h_ratio[k] / 2.0 > v->hta_pschroma[k] || v->v_ratio[k] / 2.0 > v->vta_pschroma[k]))) { in mode_support_and_system_configuration()
331 v->min_dppclk_using_single_dpp[k] = v->pixel_clock[k] *dcn_bw_max3(v->vtaps[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k]), v->h_ratio[k] * v->v_ratio[k] / v->pscl_factor[k], 1.0); in mode_support_and_system_configuration()
340 v->min_dppclk_using_single_dpp[k] = v->pixel_clock[k] *dcn_bw_max5(v->vtaps[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k]), v->h_ratio[k] * v->v_ratio[k] / v->pscl_factor[k], v->vta_pschroma[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k] / 2.0), v->h_ratio[k] * v->v_ratio[k] / 4.0 / v->pscl_factor_chroma[k], 1.0); in mode_support_and_system_configuration()
427 v->number_of_dpp_required_for_lb_size =dcn_bw_ceil2((v->vtaps[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k], 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] /dcn_bw_max2(v->h_ratio[k], 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0); in mode_support_and_system_configuration()
430 v->number_of_dpp_required_for_lb_size =dcn_bw_max2(dcn_bw_ceil2((v->vtaps[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k], 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] /dcn_bw_max2(v->h_ratio[k], 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0),dcn_bw_ceil2((v->vta_pschroma[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k] / 2.0, 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0)); in mode_support_and_system_configuration()
554 v->effective_lb_latency_hiding_source_lines_luma =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_yper_state[i][j][k] /dcn_bw_max2(v->h_ratio[k], 1.0)), 1.0)) - (v->vtaps[k] - 1.0); in mode_support_and_system_configuration()
747 v->v_init_y = (v->v_ratio[k] + v->vtaps[k] + 1.0 + v->interlace_output[k] * 0.5 * v->v_ratio[k]) / 2.0; in mode_support_and_system_configuration()
759 v->v_init_c = (v->v_ratio[k] / 2.0 + v->vtaps[ in mode_support_and_system_configuration()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_mode_vba_20v2.c149 double vtaps,
875 double vtaps, in CalculatePrefetchSourceLines()
886 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1); in CalculatePrefetchSourceLines()
888 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
1196 mode_lib->vba.vtaps[k] / 6.0 in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1206 if ((mode_lib->vba.htaps[k] > 6 || mode_lib->vba.vtaps[k] > 6) in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1932 mode_lib->vba.vtaps[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2456 1)) - (mode_lib->vba.vtaps[k] - 1); in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3381 || mode_lib->vba.vtaps[k] != 1.0)) { in dml20v2_ModeSupportAndSystemConfigurationFull()
3383 } else if (mode_lib->vba.vtaps[ in dml20v2_ModeSupportAndSystemConfigurationFull()
872 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) CalculatePrefetchSourceLines() argument
[all...]
H A Ddisplay_mode_vba_20.c125 double vtaps,
815 double vtaps, in CalculatePrefetchSourceLines()
826 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1); in CalculatePrefetchSourceLines()
828 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
1136 mode_lib->vba.vtaps[k] / 6.0 in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1146 if ((mode_lib->vba.htaps[k] > 6 || mode_lib->vba.vtaps[k] > 6) in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1896 mode_lib->vba.vtaps[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2422 1)) - (mode_lib->vba.vtaps[k] - 1); in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3308 || mode_lib->vba.vtaps[k] != 1.0)) { in dml20_ModeSupportAndSystemConfigurationFull()
3310 } else if (mode_lib->vba.vtaps[ in dml20_ModeSupportAndSystemConfigurationFull()
812 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) CalculatePrefetchSourceLines() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_mode_vba_20v2.c149 double vtaps,
875 double vtaps, in CalculatePrefetchSourceLines()
886 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1); in CalculatePrefetchSourceLines()
888 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
1196 mode_lib->vba.vtaps[k] / 6.0 in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1206 if ((mode_lib->vba.htaps[k] > 6 || mode_lib->vba.vtaps[k] > 6) in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1932 mode_lib->vba.vtaps[k], in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2456 1)) - (mode_lib->vba.vtaps[k] - 1); in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3415 || mode_lib->vba.vtaps[k] != 1.0)) { in dml20v2_ModeSupportAndSystemConfigurationFull()
3417 } else if (mode_lib->vba.vtaps[ in dml20v2_ModeSupportAndSystemConfigurationFull()
872 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) CalculatePrefetchSourceLines() argument
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H A Ddisplay_mode_vba_20.c125 double vtaps,
815 double vtaps, in CalculatePrefetchSourceLines()
826 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1); in CalculatePrefetchSourceLines()
828 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1); in CalculatePrefetchSourceLines()
1136 mode_lib->vba.vtaps[k] / 6.0 in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1146 if ((mode_lib->vba.htaps[k] > 6 || mode_lib->vba.vtaps[k] > 6) in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1896 mode_lib->vba.vtaps[k], in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2422 1)) - (mode_lib->vba.vtaps[k] - 1); in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3308 || mode_lib->vba.vtaps[k] != 1.0)) { in dml20_ModeSupportAndSystemConfigurationFull()
3310 } else if (mode_lib->vba.vtaps[ in dml20_ModeSupportAndSystemConfigurationFull()
812 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) CalculatePrefetchSourceLines() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h323 unsigned int vtaps; member
H A Ddisplay_mode_lib.c226 dml_print("DML PARAMS: vtaps = %d\n", scale_taps->vtaps); in dml_log_pipe_params()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_lib.c259 dml_print("DML PARAMS: vtaps = %d\n", scale_taps->vtaps); in dml_log_pipe_params()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v11_0.c734 u32 vtaps; /* vertical scaler taps */ member
937 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) || in dce_v11_0_latency_watermark()
938 (wm->vtaps >= 5) || in dce_v11_0_latency_watermark()
1027 if (lb_partitions <= (wm->vtaps + 1)) in dce_v11_0_check_latency_hiding()
1089 wm_high.vtaps = 1; in dce_v11_0_program_watermarks()
1091 wm_high.vtaps = 2; in dce_v11_0_program_watermarks()
1128 wm_low.vtaps = 1; in dce_v11_0_program_watermarks()
1130 wm_low.vtaps = 2; in dce_v11_0_program_watermarks()
H A Ddce_v8_0.c643 u32 vtaps; /* vertical scaler taps */ member
846 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) || in dce_v8_0_latency_watermark()
847 (wm->vtaps >= 5) || in dce_v8_0_latency_watermark()
936 if (lb_partitions <= (wm->vtaps + 1)) in dce_v8_0_check_latency_hiding()
998 wm_high.vtaps = 1; in dce_v8_0_program_watermarks()
1000 wm_high.vtaps = 2; in dce_v8_0_program_watermarks()
1037 wm_low.vtaps = 1; in dce_v8_0_program_watermarks()
1039 wm_low.vtaps = 2; in dce_v8_0_program_watermarks()
H A Ddce_v10_0.c708 u32 vtaps; /* vertical scaler taps */ member
911 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) || in dce_v10_0_latency_watermark()
912 (wm->vtaps >= 5) || in dce_v10_0_latency_watermark()
1001 if (lb_partitions <= (wm->vtaps + 1)) in dce_v10_0_check_latency_hiding()
1063 wm_high.vtaps = 1; in dce_v10_0_program_watermarks()
1065 wm_high.vtaps = 2; in dce_v10_0_program_watermarks()
1102 wm_low.vtaps = 1; in dce_v10_0_program_watermarks()
1104 wm_low.vtaps = 2; in dce_v10_0_program_watermarks()
H A Ddce_v6_0.c506 u32 vtaps; /* vertical scaler taps */ member
709 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) || in dce_v6_0_latency_watermark()
710 (wm->vtaps >= 5) || in dce_v6_0_latency_watermark()
799 if (lb_partitions <= (wm->vtaps + 1)) in dce_v6_0_check_latency_hiding()
870 wm_high.vtaps = 1; in dce_v6_0_program_watermarks()
872 wm_high.vtaps = 2; in dce_v6_0_program_watermarks()
897 wm_low.vtaps = 1; in dce_v6_0_program_watermarks()
899 wm_low.vtaps = 2; in dce_v6_0_program_watermarks()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v8_0.c644 u32 vtaps; /* vertical scaler taps */ member
847 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) || in dce_v8_0_latency_watermark()
848 (wm->vtaps >= 5) || in dce_v8_0_latency_watermark()
937 if (lb_partitions <= (wm->vtaps + 1)) in dce_v8_0_check_latency_hiding()
999 wm_high.vtaps = 1; in dce_v8_0_program_watermarks()
1001 wm_high.vtaps = 2; in dce_v8_0_program_watermarks()
1038 wm_low.vtaps = 1; in dce_v8_0_program_watermarks()
1040 wm_low.vtaps = 2; in dce_v8_0_program_watermarks()
H A Ddce_v11_0.c737 u32 vtaps; /* vertical scaler taps */ member
940 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) || in dce_v11_0_latency_watermark()
941 (wm->vtaps >= 5) || in dce_v11_0_latency_watermark()
1030 if (lb_partitions <= (wm->vtaps + 1)) in dce_v11_0_check_latency_hiding()
1092 wm_high.vtaps = 1; in dce_v11_0_program_watermarks()
1094 wm_high.vtaps = 2; in dce_v11_0_program_watermarks()
1131 wm_low.vtaps = 1; in dce_v11_0_program_watermarks()
1133 wm_low.vtaps = 2; in dce_v11_0_program_watermarks()
H A Ddce_v10_0.c705 u32 vtaps; /* vertical scaler taps */ member
908 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) || in dce_v10_0_latency_watermark()
909 (wm->vtaps >= 5) || in dce_v10_0_latency_watermark()
998 if (lb_partitions <= (wm->vtaps + 1)) in dce_v10_0_check_latency_hiding()
1060 wm_high.vtaps = 1; in dce_v10_0_program_watermarks()
1062 wm_high.vtaps = 2; in dce_v10_0_program_watermarks()
1099 wm_low.vtaps = 1; in dce_v10_0_program_watermarks()
1101 wm_low.vtaps = 2; in dce_v10_0_program_watermarks()
H A Ddce_v6_0.c509 u32 vtaps; /* vertical scaler taps */ member
712 ((wm->vsc.full > b.full) && (wm->vtaps >= 3)) || in dce_v6_0_latency_watermark()
713 (wm->vtaps >= 5) || in dce_v6_0_latency_watermark()
802 if (lb_partitions <= (wm->vtaps + 1)) in dce_v6_0_check_latency_hiding()
873 wm_high.vtaps = 1; in dce_v6_0_program_watermarks()
875 wm_high.vtaps = 2; in dce_v6_0_program_watermarks()
900 wm_low.vtaps = 1; in dce_v6_0_program_watermarks()
902 wm_low.vtaps = 2; in dce_v6_0_program_watermarks()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.c191 double vtaps,
1738 double vtaps,
1750 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
1752 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1779 dml_print("DML::%s: vtaps = %f\n", __func__, vtaps);
2062 v->vtaps[k] / 6.0 * dml_min(1.0, v->HRatio[k]),
2065 if ((v->htaps[k] > 6 || v->vtaps[k] > 6) && v->DPPCLKUsingSingleDPPLuma < 2 * v->PixelClock[k]) {
2422 v->vtaps[k],
3829 || v->VRatio[k] != 1.0 || v->vtaps[
1735 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) global() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.c203 double vtaps,
1758 double vtaps,
1770 *VInitPreFill = dml_floor((VRatio + vtaps + 1) / 2.0, 1);
1772 *VInitPreFill = dml_floor((VRatio + vtaps + 1 + Interlace * 0.5 * VRatio) / 2.0, 1);
1799 dml_print("DML::%s: vtaps = %f\n", __func__, vtaps);
2083 v->vtaps[k] / 6.0 * dml_min(1.0, v->HRatio[k]),
2086 if ((v->htaps[k] > 6 || v->vtaps[k] > 6) && v->DPPCLKUsingSingleDPPLuma < 2 * v->PixelClock[k]) {
2443 v->vtaps[k],
3924 || v->VRatio[k] != 1.0 || v->vtaps[
1755 CalculatePrefetchSourceLines( struct display_mode_lib *mode_lib, double VRatio, double vtaps, bool Interlace, bool ProgressiveToInterlaceUnitInOPP, unsigned int SwathHeight, unsigned int ViewportYStart, double *VInitPreFill, unsigned int *MaxNumSwath) global() argument
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