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Searched refs:vlv_dpio_read (Results 1 - 11 of 11) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_dpio_phy.c663 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch)); in chv_set_phy_signal_level()
670 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch)); in chv_set_phy_signal_level()
677 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW9(ch)); in chv_set_phy_signal_level()
683 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW9(ch)); in chv_set_phy_signal_level()
691 val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW4(ch, i)); in chv_set_phy_signal_level()
699 val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW2(ch, i)); in chv_set_phy_signal_level()
722 val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW3(ch, i)); in chv_set_phy_signal_level()
731 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch)); in chv_set_phy_signal_level()
736 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch)); in chv_set_phy_signal_level()
754 val = vlv_dpio_read(dev_pri in chv_data_lane_soft_reset()
[all...]
H A Dintel_display.c1443 tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW14(port)); in _chv_enable_pll()
1609 val = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW14(port)); in chv_disable_pll()
8278 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW9(1)); in vlv_pllb_recal_opamp()
8283 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_REF_DW13); in vlv_pllb_recal_opamp()
8288 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW9(1)); in vlv_pllb_recal_opamp()
8292 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_REF_DW13); in vlv_pllb_recal_opamp()
8462 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW8(pipe)); in vlv_prepare_pll()
8514 coreclk = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW7(pipe)); in vlv_prepare_pll()
8576 dpio_val = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW3(port)); in chv_prepare_pll()
8584 dpio_val = vlv_dpio_read(dev_pri in chv_prepare_pll()
[all...]
H A Dintel_display_power.c1651 tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW28); in chv_dpio_cmn_power_well_enable()
1657 tmp = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW6_CH1); in chv_dpio_cmn_power_well_enable()
1666 tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW30); in chv_dpio_cmn_power_well_enable()
1740 val = vlv_dpio_read(dev_priv, pipe, reg); in assert_chv_phy_powergate()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_dpio_phy.c699 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch)); in chv_set_phy_signal_level()
706 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch)); in chv_set_phy_signal_level()
713 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW9(ch)); in chv_set_phy_signal_level()
719 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW9(ch)); in chv_set_phy_signal_level()
727 val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW4(ch, i)); in chv_set_phy_signal_level()
735 val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW2(ch, i)); in chv_set_phy_signal_level()
758 val = vlv_dpio_read(dev_priv, pipe, CHV_TX_DW3(ch, i)); in chv_set_phy_signal_level()
767 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS01_DW10(ch)); in chv_set_phy_signal_level()
772 val = vlv_dpio_read(dev_priv, pipe, VLV_PCS23_DW10(ch)); in chv_set_phy_signal_level()
790 val = vlv_dpio_read(dev_pri in chv_data_lane_soft_reset()
[all...]
H A Dintel_dpll.c1639 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW9(1)); in vlv_pllb_recal_opamp()
1644 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_REF_DW13); in vlv_pllb_recal_opamp()
1649 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW9(1)); in vlv_pllb_recal_opamp()
1653 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_REF_DW13); in vlv_pllb_recal_opamp()
1686 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW8(pipe)); in vlv_prepare_pll()
1738 coreclk = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW7(pipe)); in vlv_prepare_pll()
1829 dpio_val = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW3(port)); in chv_prepare_pll()
1837 dpio_val = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW9(port)); in chv_prepare_pll()
1870 dpio_val = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW8(port)); in chv_prepare_pll()
1877 vlv_dpio_read(dev_pri in chv_prepare_pll()
[all...]
H A Dintel_display_power_well.c1431 tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW28); in chv_dpio_cmn_power_well_enable()
1437 tmp = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW6_CH1); in chv_dpio_cmn_power_well_enable()
1446 tmp = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW30); in chv_dpio_cmn_power_well_enable()
1521 val = vlv_dpio_read(dev_priv, pipe, reg); in assert_chv_phy_powergate()
H A Dintel_display.c2805 mdiv = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW3(pipe)); in vlv_crtc_clock_get()
2833 cmn_dw13 = vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW13(port)); in chv_crtc_clock_get()
2834 pll_dw0 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW0(port)); in chv_crtc_clock_get()
2835 pll_dw1 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW1(port)); in chv_crtc_clock_get()
2836 pll_dw2 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW2(port)); in chv_crtc_clock_get()
2837 pll_dw3 = vlv_dpio_read(dev_priv, pipe, CHV_PLL_DW3(port)); in chv_crtc_clock_get()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
H A Dvlv_sideband.h78 u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg);
H A Dvlv_sideband.c230 u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg) in vlv_dpio_read() function
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A Dintel_sideband.h78 u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg);
H A Dintel_sideband.c246 u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg) in vlv_dpio_read() function

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