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Searched refs:vissctlr (Results 1 - 7 of 7) sorted by relevance

/kernel/linux/linux-6.6/drivers/hwtracing/coresight/
H A Dcoresight-etm4x-cfg.c66 CHECKREG(TRCVISSCTLR, vissctlr); in etm4_cfg_map_reg_offset()
H A Dcoresight-etm4x-core.c452 etm4x_relaxed_write32(csa, config->vissctlr, TRCVISSCTLR); in etm4_enable_hw()
1428 config->vissctlr |= BIT(shift + comparator); in etm4_set_start_stop_filter()
1444 config->vissctlr = 0x0; in etm4_set_default_filter()
1547 config->vissctlr = 0x0; in etm4_set_event_filters()
H A Dcoresight-etm4x-sysfs.c220 config->vissctlr = 0x0; in reset_store()
1080 config->vissctlr |= BIT(idx); in addr_start_store()
1135 config->vissctlr |= BIT(idx + 16); in addr_stop_store()
H A Dcoresight-etm4x.h810 * @vissctlr: Set, or read, the single address comparators that control the
856 u32 vissctlr; member
/kernel/linux/linux-5.10/drivers/hwtracing/coresight/
H A Dcoresight-etm4x.h222 * @vissctlr: Set, or read, the single address comparators that control the
268 u32 vissctlr; member
H A Dcoresight-etm4x-core.c143 writel_relaxed(config->vissctlr, in etm4_enable_hw()
930 config->vissctlr |= BIT(shift + comparator); in etm4_set_start_stop_filter()
946 config->vissctlr = 0x0; in etm4_set_default_filter()
1049 config->vissctlr = 0x0; in etm4_set_event_filters()
H A Dcoresight-etm4x-sysfs.c219 config->vissctlr = 0x0; in reset_store()
1071 config->vissctlr |= BIT(idx); in addr_start_store()
1126 config->vissctlr |= BIT(idx + 16); in addr_stop_store()

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