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Searched refs:vinst_ctrl (Results 1 - 7 of 7) sorted by relevance

/kernel/linux/linux-5.10/drivers/hwtracing/coresight/
H A Dcoresight-etm4x-sysfs.c208 config->vinst_ctrl = BIT(0); in reset_store()
212 config->vinst_ctrl |= BIT(9); in reset_store()
416 config->vinst_ctrl |= BIT(9); in mode_store()
418 config->vinst_ctrl &= ~BIT(9); in mode_store()
422 config->vinst_ctrl |= BIT(10); in mode_store()
424 config->vinst_ctrl &= ~BIT(10); in mode_store()
429 config->vinst_ctrl |= BIT(11); in mode_store()
431 config->vinst_ctrl &= ~BIT(11); in mode_store()
718 val = config->vinst_ctrl & ETMv4_EVENT_MASK; in event_vinst_show()
735 config->vinst_ctrl in event_vinst_store()
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H A Dcoresight-etm4x.h220 * @vinst_ctrl: Controls instruction trace filtering.
266 u32 vinst_ctrl; member
353 u32 vinst_ctrl; member
H A Dcoresight-etm4x-core.c141 writel_relaxed(config->vinst_ctrl, drvdata->base + TRCVICTLR); in etm4_enable_hw()
802 config->vinst_ctrl &= ~(ETM_EXLEVEL_S_VICTLR_MASK | ETM_EXLEVEL_NS_VICTLR_MASK); in etm4_set_victlr_access()
806 * bits in vinst_ctrl, same bit pattern as TRCACATRn values returned by in etm4_set_victlr_access()
810 config->vinst_ctrl |= (u32)access_type; in etm4_set_victlr_access()
829 config->vinst_ctrl = BIT(0); in etm4_set_default_config()
942 config->vinst_ctrl |= BIT(9); in etm4_set_default_filter()
1046 config->vinst_ctrl |= BIT(9); in etm4_set_event_filters()
1074 config->vinst_ctrl |= BIT(9); in etm4_set_event_filters()
/kernel/linux/linux-6.6/drivers/hwtracing/coresight/
H A Dcoresight-etm4x-sysfs.c209 config->vinst_ctrl = FIELD_PREP(TRCVICTLR_EVENT_MASK, 0x01); in reset_store()
213 config->vinst_ctrl |= TRCVICTLR_SSSTATUS; in reset_store()
420 config->vinst_ctrl |= TRCVICTLR_SSSTATUS; in mode_store()
422 config->vinst_ctrl &= ~TRCVICTLR_SSSTATUS; in mode_store()
426 config->vinst_ctrl |= TRCVICTLR_TRCRESET; in mode_store()
428 config->vinst_ctrl &= ~TRCVICTLR_TRCRESET; in mode_store()
433 config->vinst_ctrl |= TRCVICTLR_TRCERR; in mode_store()
435 config->vinst_ctrl &= ~TRCVICTLR_TRCERR; in mode_store()
727 val = FIELD_GET(TRCVICTLR_EVENT_MASK, config->vinst_ctrl); in event_vinst_show()
744 config->vinst_ctrl in event_vinst_store()
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H A Dcoresight-etm4x-cfg.c64 CHECKREG(TRCVICTLR, vinst_ctrl); in etm4_cfg_map_reg_offset()
H A Dcoresight-etm4x-core.c450 etm4x_relaxed_write32(csa, config->vinst_ctrl, TRCVICTLR); in etm4_enable_hw()
1311 config->vinst_ctrl &= ~TRCVICTLR_EXLEVEL_MASK; in etm4_set_victlr_access()
1312 config->vinst_ctrl |= etm4_get_victlr_access_type(config); in etm4_set_victlr_access()
1331 config->vinst_ctrl = FIELD_PREP(TRCVICTLR_EVENT_MASK, 0x01); in etm4_set_default_config()
1440 config->vinst_ctrl |= TRCVICTLR_SSSTATUS; in etm4_set_default_filter()
1544 config->vinst_ctrl |= TRCVICTLR_SSSTATUS; in etm4_set_event_filters()
1572 config->vinst_ctrl |= TRCVICTLR_SSSTATUS; in etm4_set_event_filters()
H A Dcoresight-etm4x.h808 * @vinst_ctrl: Controls instruction trace filtering.
854 u32 vinst_ctrl; member
941 u32 vinst_ctrl; member

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