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Searched refs:vddc_table (Results 1 - 20 of 20) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu_helper.c540 struct phm_ppt_v1_clock_voltage_dependency_table *vddc_table; in phm_apply_dal_min_voltage_request() local
556 vddc_table = table_info->vdd_dep_on_sclk; in phm_apply_dal_min_voltage_request()
557 for (i = 0; i < vddc_table->count; i++) { in phm_apply_dal_min_voltage_request()
558 if (req_vddc <= vddc_table->entries[i].vddc) { in phm_apply_dal_min_voltage_request()
559 req_volt = (((uint32_t)vddc_table->entries[i].vddc) * VOLTAGE_SCALE); in phm_apply_dal_min_voltage_request()
H A Dsmu7_hwmgr.h107 struct smu7_single_dpm_table vddc_table; member
H A Dsmu8_hwmgr.c443 struct phm_clock_voltage_dependency_table *vddc_table = in smu8_upload_pptable_to_smu() local
465 PP_ASSERT_WITH_CODE((vddc_table->count <= SMU8_MAX_HARDWARE_POWERLEVELS), in smu8_upload_pptable_to_smu()
480 (i < vddc_table->count) ? (uint8_t)vddc_table->entries[i].v : 0; in smu8_upload_pptable_to_smu()
482 (i < vddc_table->count) ? vddc_table->entries[i].clk : 0; in smu8_upload_pptable_to_smu()
H A Dsmu7_hwmgr.c694 &data->dpm_table.vddc_table, in smu7_reset_dpm_tables()
770 data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; in smu7_setup_dpm_tables_v0()
771 data->dpm_table.vddc_table.dpm_levels[i].param1 = std_voltage_table->entries[i].Leakage; in smu7_setup_dpm_tables_v0()
773 data->dpm_table.vddc_table.dpm_levels[i].enabled = true; in smu7_setup_dpm_tables_v0()
776 data->dpm_table.vddc_table.count = allowed_vdd_sclk_table->count; in smu7_setup_dpm_tables_v0()
H A Dvega10_processpptables.c1153 const ATOM_Vega10_Voltage_Lookup_Table *vddc_table = in init_dpm_2_parameters() local
1158 &pp_table_info->vddc_lookup_table, vddc_table, 8); in init_dpm_2_parameters()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu_helper.c551 struct phm_ppt_v1_clock_voltage_dependency_table *vddc_table; in phm_apply_dal_min_voltage_request() local
567 vddc_table = table_info->vdd_dep_on_sclk; in phm_apply_dal_min_voltage_request()
568 for (i = 0; i < vddc_table->count; i++) { in phm_apply_dal_min_voltage_request()
569 if (req_vddc <= vddc_table->entries[i].vddc) { in phm_apply_dal_min_voltage_request()
570 req_volt = (((uint32_t)vddc_table->entries[i].vddc) * VOLTAGE_SCALE); in phm_apply_dal_min_voltage_request()
H A Dsmu8_hwmgr.c443 struct phm_clock_voltage_dependency_table *vddc_table = in smu8_upload_pptable_to_smu() local
465 PP_ASSERT_WITH_CODE((vddc_table->count <= SMU8_MAX_HARDWARE_POWERLEVELS), in smu8_upload_pptable_to_smu()
480 (i < vddc_table->count) ? (uint8_t)vddc_table->entries[i].v : 0; in smu8_upload_pptable_to_smu()
482 (i < vddc_table->count) ? vddc_table->entries[i].clk : 0; in smu8_upload_pptable_to_smu()
H A Dsmu7_hwmgr.h107 struct smu7_single_dpm_table vddc_table; member
H A Dvega10_processpptables.c1118 const ATOM_Vega10_Voltage_Lookup_Table *vddc_table = in init_dpm_2_parameters() local
1123 &pp_table_info->vddc_lookup_table, vddc_table, 8); in init_dpm_2_parameters()
H A Dsmu7_hwmgr.c756 &data->dpm_table.vddc_table, in smu7_reset_dpm_tables()
832 data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v; in smu7_setup_dpm_tables_v0()
833 data->dpm_table.vddc_table.dpm_levels[i].param1 = std_voltage_table->entries[i].Leakage; in smu7_setup_dpm_tables_v0()
835 data->dpm_table.vddc_table.dpm_levels[i].enabled = true; in smu7_setup_dpm_tables_v0()
838 data->dpm_table.vddc_table.count = allowed_vdd_sclk_table->count; in smu7_setup_dpm_tables_v0()
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Drv770_dpm.c578 if (vddc <= pi->vddc_table[i].vddc) { in rv770_populate_vddc_value()
579 voltage->index = pi->vddc_table[i].vddc_index; in rv770_populate_vddc_value()
1120 table->highSMIO[pi->vddc_table[i].vddc_index] = in rv770_populate_smc_vddc_table()
1121 pi->vddc_table[i].high_smio; in rv770_populate_smc_vddc_table()
1122 table->lowSMIO[pi->vddc_table[i].vddc_index] = in rv770_populate_smc_vddc_table()
1123 cpu_to_be32(pi->vddc_table[i].low_smio); in rv770_populate_smc_vddc_table()
1133 pi->vddc_table[i].vddc)); in rv770_populate_smc_vddc_table()
1137 pi->vddc_table[i].vddc_index; in rv770_populate_smc_vddc_table()
1251 pi->vddc_table[i].vddc = (u16)(min + i * step); in rv770_construct_vddc_table()
1253 pi->vddc_table[ in rv770_construct_vddc_table()
[all...]
H A Dci_dpm.h72 struct ci_single_dpm_table vddc_table; member
H A Drv770_dpm.h106 struct vddc_table_entry vddc_table[MAX_NO_VREG_STEPS]; member
H A Dci_dpm.c3455 &pi->dpm_table.vddc_table, in ci_setup_default_dpm_tables()
3491 pi->dpm_table.vddc_table.dpm_levels[i].value = in ci_setup_default_dpm_tables()
3493 pi->dpm_table.vddc_table.dpm_levels[i].param1 = in ci_setup_default_dpm_tables()
3495 pi->dpm_table.vddc_table.dpm_levels[i].enabled = true; in ci_setup_default_dpm_tables()
3497 pi->dpm_table.vddc_table.count = allowed_sclk_vddc_table->count; in ci_setup_default_dpm_tables()
3772 struct radeon_clock_voltage_dependency_table *vddc_table = in ci_apply_disp_minimum_voltage_request() local
3787 for (i = 0; i < vddc_table->count; i++) { in ci_apply_disp_minimum_voltage_request()
3788 if (requested_voltage <= vddc_table->entries[i].v) { in ci_apply_disp_minimum_voltage_request()
3789 requested_voltage = vddc_table->entries[i].v; in ci_apply_disp_minimum_voltage_request()
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Drv770_dpm.c580 if (vddc <= pi->vddc_table[i].vddc) { in rv770_populate_vddc_value()
581 voltage->index = pi->vddc_table[i].vddc_index; in rv770_populate_vddc_value()
1122 table->highSMIO[pi->vddc_table[i].vddc_index] = in rv770_populate_smc_vddc_table()
1123 pi->vddc_table[i].high_smio; in rv770_populate_smc_vddc_table()
1124 table->lowSMIO[pi->vddc_table[i].vddc_index] = in rv770_populate_smc_vddc_table()
1125 cpu_to_be32(pi->vddc_table[i].low_smio); in rv770_populate_smc_vddc_table()
1135 pi->vddc_table[i].vddc)); in rv770_populate_smc_vddc_table()
1139 pi->vddc_table[i].vddc_index; in rv770_populate_smc_vddc_table()
1253 pi->vddc_table[i].vddc = (u16)(min + i * step); in rv770_construct_vddc_table()
1255 pi->vddc_table[ in rv770_construct_vddc_table()
[all...]
H A Drv770_dpm.h106 struct vddc_table_entry vddc_table[MAX_NO_VREG_STEPS]; member
H A Dci_dpm.h72 struct ci_single_dpm_table vddc_table; member
H A Dci_dpm.c3431 &pi->dpm_table.vddc_table, in ci_setup_default_dpm_tables()
3467 pi->dpm_table.vddc_table.dpm_levels[i].value = in ci_setup_default_dpm_tables()
3469 pi->dpm_table.vddc_table.dpm_levels[i].param1 = in ci_setup_default_dpm_tables()
3471 pi->dpm_table.vddc_table.dpm_levels[i].enabled = true; in ci_setup_default_dpm_tables()
3473 pi->dpm_table.vddc_table.count = allowed_sclk_vddc_table->count; in ci_setup_default_dpm_tables()
3748 struct radeon_clock_voltage_dependency_table *vddc_table = in ci_apply_disp_minimum_voltage_request() local
3763 for (i = 0; i < vddc_table->count; i++) { in ci_apply_disp_minimum_voltage_request()
3764 if (requested_voltage <= vddc_table->entries[i].v) { in ci_apply_disp_minimum_voltage_request()
3765 requested_voltage = vddc_table->entries[i].v; in ci_apply_disp_minimum_voltage_request()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/
H A Dsi_dpm.h562 struct vddc_table_entry vddc_table[MAX_NO_VREG_STEPS]; member
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.h562 struct vddc_table_entry vddc_table[MAX_NO_VREG_STEPS]; member

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