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Searched refs:up_hyst_offset (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c2567 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in fiji_update_dpm_settings() local
2594 up_hyst_offset = array + (sizeof(SMU73_Discrete_GraphicsLevel) * i) in fiji_update_dpm_settings()
2598 offset = up_hyst_offset & ~0x3; in fiji_update_dpm_settings()
2600 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
2629 up_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i) in fiji_update_dpm_settings()
2633 offset = up_hyst_offset & ~0x3; in fiji_update_dpm_settings()
2635 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
H A Dci_smumgr.c2775 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in ci_update_dpm_settings() local
2802 up_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i) in ci_update_dpm_settings()
2806 offset = up_hyst_offset & ~0x3; in ci_update_dpm_settings()
2808 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()
2837 up_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i) in ci_update_dpm_settings()
2841 offset = up_hyst_offset & ~0x3; in ci_update_dpm_settings()
2843 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()
H A Dtonga_smumgr.c3164 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in tonga_update_dpm_settings() local
3191 up_hyst_offset = array + (sizeof(SMU72_Discrete_GraphicsLevel) * i) in tonga_update_dpm_settings()
3195 offset = up_hyst_offset & ~0x3; in tonga_update_dpm_settings()
3197 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()
3226 up_hyst_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i) in tonga_update_dpm_settings()
3230 offset = up_hyst_offset & ~0x3; in tonga_update_dpm_settings()
3232 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()
H A Dpolaris10_smumgr.c2485 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in polaris10_update_dpm_settings() local
2512 up_hyst_offset = array + (sizeof(SMU74_Discrete_GraphicsLevel) * i) in polaris10_update_dpm_settings()
2516 offset = up_hyst_offset & ~0x3; in polaris10_update_dpm_settings()
2518 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
2547 up_hyst_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i) in polaris10_update_dpm_settings()
2551 offset = up_hyst_offset & ~0x3; in polaris10_update_dpm_settings()
2553 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c2565 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in fiji_update_dpm_settings() local
2592 up_hyst_offset = array + (sizeof(SMU73_Discrete_GraphicsLevel) * i) in fiji_update_dpm_settings()
2596 offset = up_hyst_offset & ~0x3; in fiji_update_dpm_settings()
2598 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
2627 up_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i) in fiji_update_dpm_settings()
2631 offset = up_hyst_offset & ~0x3; in fiji_update_dpm_settings()
2633 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
H A Dtonga_smumgr.c3164 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in tonga_update_dpm_settings() local
3191 up_hyst_offset = array + (sizeof(SMU72_Discrete_GraphicsLevel) * i) in tonga_update_dpm_settings()
3195 offset = up_hyst_offset & ~0x3; in tonga_update_dpm_settings()
3197 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()
3226 up_hyst_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i) in tonga_update_dpm_settings()
3230 offset = up_hyst_offset & ~0x3; in tonga_update_dpm_settings()
3232 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()
H A Dpolaris10_smumgr.c2603 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in polaris10_update_dpm_settings() local
2630 up_hyst_offset = array + (sizeof(SMU74_Discrete_GraphicsLevel) * i) in polaris10_update_dpm_settings()
2634 offset = up_hyst_offset & ~0x3; in polaris10_update_dpm_settings()
2636 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
2665 up_hyst_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i) in polaris10_update_dpm_settings()
2669 offset = up_hyst_offset & ~0x3; in polaris10_update_dpm_settings()
2671 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
H A Dci_smumgr.c2776 uint32_t offset, up_hyst_offset, down_hyst_offset, clk_activity_offset, tmp; in ci_update_dpm_settings() local
2803 up_hyst_offset = array + (sizeof(SMU7_Discrete_GraphicsLevel) * i) in ci_update_dpm_settings()
2807 offset = up_hyst_offset & ~0x3; in ci_update_dpm_settings()
2809 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()
2838 up_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i) in ci_update_dpm_settings()
2842 offset = up_hyst_offset & ~0x3; in ci_update_dpm_settings()
2844 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()

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