Home
last modified time | relevance | path

Searched refs:ulp_div_table (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-imx7ulp.c35 static const struct clk_div_table ulp_div_table[] = { variable
102 hws[IMX7ULP_CLK_SPLL_BUS_CLK] = imx_clk_hw_divider_gate("spll_bus_clk", "spll_sel", CLK_SET_RATE_GATE, base + 0x604, 8, 3, 0, ulp_div_table, &imx_ccm_lock); in imx7ulp_clk_scg1_init()
116 0, ulp_div_table, &imx_ccm_lock); in imx7ulp_clk_scg1_init()
125 CLK_DIVIDER_READ_ONLY, ulp_div_table, &imx_ccm_lock); in imx7ulp_clk_scg1_init()
127 CLK_DIVIDER_READ_ONLY, ulp_div_table, &imx_ccm_lock); in imx7ulp_clk_scg1_init()
/kernel/linux/linux-6.6/drivers/clk/imx/
H A Dclk-imx7ulp.c35 static const struct clk_div_table ulp_div_table[] = { variable
102 hws[IMX7ULP_CLK_SPLL_BUS_CLK] = imx_clk_hw_divider_gate("spll_bus_clk", "spll_sel", CLK_SET_RATE_GATE, base + 0x604, 8, 3, 0, ulp_div_table, &imx_ccm_lock); in imx7ulp_clk_scg1_init()
116 0, ulp_div_table, &imx_ccm_lock); in imx7ulp_clk_scg1_init()
125 CLK_DIVIDER_READ_ONLY, ulp_div_table, &imx_ccm_lock); in imx7ulp_clk_scg1_init()
127 CLK_DIVIDER_READ_ONLY, ulp_div_table, &imx_ccm_lock); in imx7ulp_clk_scg1_init()

Completed in 2 milliseconds