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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
H A Dv10_structs.h29 uint32_t reserved_0; // offset: 0 (0x0)
30 uint32_t reserved_1; // offset: 1 (0x1)
31 uint32_t reserved_2; // offset: 2 (0x2)
32 uint32_t reserved_3; // offset: 3 (0x3)
33 uint32_t reserved_4; // offset: 4 (0x4)
34 uint32_t reserved_5; // offset: 5 (0x5)
35 uint32_t reserved_6; // offset: 6 (0x6)
36 uint32_t reserved_7; // offset: 7 (0x7)
37 uint32_t reserved_8; // offset: 8 (0x8)
38 uint32_t reserved_
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H A Dvi_structs.h28 uint32_t sdmax_rlcx_rb_cntl;
29 uint32_t sdmax_rlcx_rb_base;
30 uint32_t sdmax_rlcx_rb_base_hi;
31 uint32_t sdmax_rlcx_rb_rptr;
32 uint32_t sdmax_rlcx_rb_wptr;
33 uint32_t sdmax_rlcx_rb_wptr_poll_cntl;
34 uint32_t sdmax_rlcx_rb_wptr_poll_addr_hi;
35 uint32_t sdmax_rlcx_rb_wptr_poll_addr_lo;
36 uint32_t sdmax_rlcx_rb_rptr_addr_hi;
37 uint32_t sdmax_rlcx_rb_rptr_addr_l
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H A Dv9_structs.h28 uint32_t sdmax_rlcx_rb_cntl;
29 uint32_t sdmax_rlcx_rb_base;
30 uint32_t sdmax_rlcx_rb_base_hi;
31 uint32_t sdmax_rlcx_rb_rptr;
32 uint32_t sdmax_rlcx_rb_rptr_hi;
33 uint32_t sdmax_rlcx_rb_wptr;
34 uint32_t sdmax_rlcx_rb_wptr_hi;
35 uint32_t sdmax_rlcx_rb_wptr_poll_cntl;
36 uint32_t sdmax_rlcx_rb_rptr_addr_hi;
37 uint32_t sdmax_rlcx_rb_rptr_addr_l
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H A Dcik_structs.h28 uint32_t header;
29 uint32_t compute_dispatch_initiator;
30 uint32_t compute_dim_x;
31 uint32_t compute_dim_y;
32 uint32_t compute_dim_z;
33 uint32_t compute_start_x;
34 uint32_t compute_start_y;
35 uint32_t compute_start_z;
36 uint32_t compute_num_thread_x;
37 uint32_t compute_num_thread_
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/
H A Dv10_structs.h29 uint32_t reserved_0; // offset: 0 (0x0)
30 uint32_t reserved_1; // offset: 1 (0x1)
31 uint32_t reserved_2; // offset: 2 (0x2)
32 uint32_t reserved_3; // offset: 3 (0x3)
33 uint32_t reserved_4; // offset: 4 (0x4)
34 uint32_t reserved_5; // offset: 5 (0x5)
35 uint32_t reserved_6; // offset: 6 (0x6)
36 uint32_t reserved_7; // offset: 7 (0x7)
37 uint32_t reserved_8; // offset: 8 (0x8)
38 uint32_t reserved_
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H A Dv11_structs.h28 uint32_t shadow_base_lo; // offset: 0 (0x0)
29 uint32_t shadow_base_hi; // offset: 1 (0x1)
30 uint32_t gds_bkup_base_lo; // offset: 2 (0x2)
31 uint32_t gds_bkup_base_hi; // offset: 3 (0x3)
32 uint32_t fw_work_area_base_lo; // offset: 4 (0x4)
33 uint32_t fw_work_area_base_hi; // offset: 5 (0x5)
34 uint32_t shadow_initialized; // offset: 6 (0x6)
35 uint32_t ib_vmid; // offset: 7 (0x7)
36 uint32_t reserved_8; // offset: 8 (0x8)
37 uint32_t reserved_
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H A Dvi_structs.h28 uint32_t sdmax_rlcx_rb_cntl;
29 uint32_t sdmax_rlcx_rb_base;
30 uint32_t sdmax_rlcx_rb_base_hi;
31 uint32_t sdmax_rlcx_rb_rptr;
32 uint32_t sdmax_rlcx_rb_wptr;
33 uint32_t sdmax_rlcx_rb_wptr_poll_cntl;
34 uint32_t sdmax_rlcx_rb_wptr_poll_addr_hi;
35 uint32_t sdmax_rlcx_rb_wptr_poll_addr_lo;
36 uint32_t sdmax_rlcx_rb_rptr_addr_hi;
37 uint32_t sdmax_rlcx_rb_rptr_addr_l
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H A Dv9_structs.h28 uint32_t sdmax_rlcx_rb_cntl;
29 uint32_t sdmax_rlcx_rb_base;
30 uint32_t sdmax_rlcx_rb_base_hi;
31 uint32_t sdmax_rlcx_rb_rptr;
32 uint32_t sdmax_rlcx_rb_rptr_hi;
33 uint32_t sdmax_rlcx_rb_wptr;
34 uint32_t sdmax_rlcx_rb_wptr_hi;
35 uint32_t sdmax_rlcx_rb_wptr_poll_cntl;
36 uint32_t sdmax_rlcx_rb_rptr_addr_hi;
37 uint32_t sdmax_rlcx_rb_rptr_addr_l
[all...]
H A Dcik_structs.h28 uint32_t header;
29 uint32_t compute_dispatch_initiator;
30 uint32_t compute_dim_x;
31 uint32_t compute_dim_y;
32 uint32_t compute_dim_z;
33 uint32_t compute_start_x;
34 uint32_t compute_start_y;
35 uint32_t compute_start_z;
36 uint32_t compute_num_thread_x;
37 uint32_t compute_num_thread_
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H A Ddiscovery.h59 uint32_t binary_signature; /* 0x7, 0x14, 0x21, 0x28 */
76 uint32_t signature; /* Table Signature */
79 uint32_t id; /* Table ID */
107 uint32_t base_address[]; /* variable number of Addresses */
125 uint32_t base_address[]; /* Base Address list. Corresponds to the num_base_address field*/
143 DECLARE_FLEX_ARRAY(uint32_t, base_address); /* 32-bit Base Address list. Corresponds to the num_base_address field*/
170 uint32_t table_id; /* table ID */
173 uint32_t size; /* size of the entire header+data in bytes */
179 uint32_t gc_num_se;
180 uint32_t gc_num_wgp0_per_s
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H A Dkgd_kfd_interface.h51 uint32_t vmid;
52 uint32_t mc_id;
53 uint32_t status;
61 uint32_t num_shader_engines;
62 uint32_t num_shader_arrays_per_engine;
63 uint32_t num_cu_per_sh;
64 uint32_t cu_active_number;
65 uint32_t cu_ao_mask;
66 uint32_t simd_per_cu;
67 uint32_t max_waves_per_sim
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_pm4_headers_ai.h32 uint32_t reserved1 : 8; /* < reserved */
33 uint32_t opcode : 8; /* < IT opcode */
34 uint32_t count : 14;/* < number of DWORDs - 1 in the
37 uint32_t type : 2; /* < packet identifier.
41 uint32_t u32All;
59 uint32_t ordinal1;
64 uint32_t vmid_mask:16;
65 uint32_t unmap_latency:8;
66 uint32_t reserved1:5;
69 uint32_t ordinal
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H A Dkfd_pm4_headers_vi.h32 uint32_t reserved1 : 8; /* < reserved */
33 uint32_t opcode : 8; /* < IT opcode */
34 uint32_t count : 14;/* < Number of DWORDS - 1 in the
37 uint32_t type : 2; /* < packet identifier
41 uint32_t u32All;
59 uint32_t ordinal1;
64 uint32_t vmid_mask:16;
65 uint32_t unmap_latency:8;
66 uint32_t reserved1:5;
69 uint32_t ordinal
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_pm4_headers_ai.h31 uint32_t reserved1 : 8; /* < reserved */
32 uint32_t opcode : 8; /* < IT opcode */
33 uint32_t count : 14;/* < number of DWORDs - 1 in the
36 uint32_t type : 2; /* < packet identifier.
40 uint32_t u32All;
58 uint32_t ordinal1;
63 uint32_t vmid_mask:16;
64 uint32_t unmap_latency:8;
65 uint32_t reserved1:5;
68 uint32_t ordinal
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H A Dkfd_pm4_headers_vi.h31 uint32_t reserved1 : 8; /* < reserved */
32 uint32_t opcode : 8; /* < IT opcode */
33 uint32_t count : 14;/* < Number of DWORDS - 1 in the
36 uint32_t type : 2; /* < packet identifier
40 uint32_t u32All;
58 uint32_t ordinal1;
63 uint32_t vmid_mask:16;
64 uint32_t unmap_latency:8;
65 uint32_t reserved1:5;
68 uint32_t ordinal
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/kernel/linux/linux-5.10/tools/firewire/
H A Dnosy-dump.h15 uint32_t timestamp;
18 uint32_t zero:24;
19 uint32_t phy_id:6;
20 uint32_t identifier:2;
24 uint32_t zero:16;
25 uint32_t gap_count:6;
26 uint32_t set_gap_count:1;
27 uint32_t set_root:1;
28 uint32_t root_id:6;
29 uint32_t identifie
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/kernel/linux/linux-6.6/tools/firewire/
H A Dnosy-dump.h15 uint32_t timestamp;
18 uint32_t zero:24;
19 uint32_t phy_id:6;
20 uint32_t identifier:2;
24 uint32_t zero:16;
25 uint32_t gap_count:6;
26 uint32_t set_gap_count:1;
27 uint32_t set_root:1;
28 uint32_t root_id:6;
29 uint32_t identifie
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/kernel/linux/linux-5.10/arch/mips/include/asm/octeon/
H A Dcvmx-pciercx-defs.h55 uint32_t u32;
57 __BITFIELD_FIELD(uint32_t dpe:1,
58 __BITFIELD_FIELD(uint32_t sse:1,
59 __BITFIELD_FIELD(uint32_t rma:1,
60 __BITFIELD_FIELD(uint32_t rta:1,
61 __BITFIELD_FIELD(uint32_t sta:1,
62 __BITFIELD_FIELD(uint32_t devt:2,
63 __BITFIELD_FIELD(uint32_t mdpe:1,
64 __BITFIELD_FIELD(uint32_t fbb:1,
65 __BITFIELD_FIELD(uint32_t reserved_22_2
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/kernel/linux/linux-6.6/arch/mips/include/asm/octeon/
H A Dcvmx-pciercx-defs.h55 uint32_t u32;
57 __BITFIELD_FIELD(uint32_t dpe:1,
58 __BITFIELD_FIELD(uint32_t sse:1,
59 __BITFIELD_FIELD(uint32_t rma:1,
60 __BITFIELD_FIELD(uint32_t rta:1,
61 __BITFIELD_FIELD(uint32_t sta:1,
62 __BITFIELD_FIELD(uint32_t devt:2,
63 __BITFIELD_FIELD(uint32_t mdpe:1,
64 __BITFIELD_FIELD(uint32_t fbb:1,
65 __BITFIELD_FIELD(uint32_t reserved_22_2
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/include/
H A Dgrph_object_ctrl_defs.h67 uint32_t enum_id:16; /* 1 based enum */
73 uint32_t clk_mask_register_index;
74 uint32_t clk_en_register_index;
75 uint32_t clk_y_register_index;
76 uint32_t clk_a_register_index;
77 uint32_t data_mask_register_index;
78 uint32_t data_en_register_index;
79 uint32_t data_y_register_index;
80 uint32_t data_a_register_index;
82 uint32_t clk_mask_shif
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/include/
H A Dgrph_object_ctrl_defs.h67 uint32_t enum_id:16; /* 1 based enum */
73 uint32_t clk_mask_register_index;
74 uint32_t clk_en_register_index;
75 uint32_t clk_y_register_index;
76 uint32_t clk_a_register_index;
77 uint32_t data_mask_register_index;
78 uint32_t data_en_register_index;
79 uint32_t data_y_register_index;
80 uint32_t data_a_register_index;
82 uint32_t clk_mask_shif
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ucode.h29 uint32_t size_bytes; /* size of the entire header+image(s) in bytes */
30 uint32_t header_size_bytes; /* size of just the header in bytes */
35 uint32_t ucode_version;
36 uint32_t ucode_size_bytes; /* size of ucode in bytes */
37 uint32_t ucode_array_offset_bytes; /* payload offset from the start of the header */
38 uint32_t crc32; /* crc32 checksum of the payload */
44 uint32_t io_debug_size_bytes; /* size of debug array in dwords */
45 uint32_t io_debug_array_offset_bytes; /* payload offset from the start of the header */
51 uint32_t ucode_start_addr;
57 uint32_t ppt_offset_byte
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/kernel/linux/linux-6.6/sound/soc/qcom/qdsp6/
H A Daudioreach.h68 uint32_t property_flag;
72 uint32_t shm_addr_lsw;
73 uint32_t shm_addr_msw;
74 uint32_t mem_size_bytes;
78 uint32_t mem_map_handle;
82 uint32_t mem_map_handle;
91 uint32_t num_modules_list;
97 uint32_t num_modules_prop_cfg;
101 uint32_t instance_id;
102 uint32_t num_prop
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/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5.xml.h180 static inline uint32_t MDSS_HW_VERSION_STEP(uint32_t val) in MDSS_HW_VERSION_STEP()
186 static inline uint32_t MDSS_HW_VERSION_MINOR(uint32_t val) in MDSS_HW_VERSION_MINOR()
192 static inline uint32_t MDSS_HW_VERSION_MAJOR(uint32_t val) in MDSS_HW_VERSION_MAJOR()
207 static inline uint32_t MDP5_HW_VERSION_STEP(uint32_t val) in MDP5_HW_VERSION_STEP()
213 static inline uint32_t MDP5_HW_VERSION_MINOR(uint32_t va
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/kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5.xml.h191 static inline uint32_t MDSS_HW_VERSION_STEP(uint32_t val) in MDSS_HW_VERSION_STEP()
197 static inline uint32_t MDSS_HW_VERSION_MINOR(uint32_t val) in MDSS_HW_VERSION_MINOR()
203 static inline uint32_t MDSS_HW_VERSION_MAJOR(uint32_t val) in MDSS_HW_VERSION_MAJOR()
218 static inline uint32_t MDP5_HW_VERSION_STEP(uint32_t val) in MDP5_HW_VERSION_STEP()
224 static inline uint32_t MDP5_HW_VERSION_MINOR(uint32_t va
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