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Searched refs:ucode (Results 1 - 25 of 144) sorted by relevance

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/kernel/linux/linux-5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Ducode_loader.c40 int brcms_ucode_data_init(struct brcms_info *wl, struct brcms_ucode *ucode) in brcms_ucode_data_init() argument
47 brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn0bsinitvals24, in brcms_ucode_data_init()
50 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn0initvals24, in brcms_ucode_data_init()
53 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn1bsinitvals24, in brcms_ucode_data_init()
56 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn1initvals24, in brcms_ucode_data_init()
59 brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn2bsinitvals24, in brcms_ucode_data_init()
62 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn2initvals24, in brcms_ucode_data_init()
65 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11n0absinitvals16, in brcms_ucode_data_init()
68 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11n0bsinitvals16, in brcms_ucode_data_init()
71 rc : brcms_ucode_init_buf(wl, (void **)&ucode in brcms_ucode_data_init()
94 brcms_ucode_data_free(struct brcms_ucode *ucode) brcms_ucode_data_free() argument
[all...]
/kernel/linux/linux-6.6/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Ducode_loader.c40 int brcms_ucode_data_init(struct brcms_info *wl, struct brcms_ucode *ucode) in brcms_ucode_data_init() argument
47 brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn0bsinitvals24, in brcms_ucode_data_init()
50 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn0initvals24, in brcms_ucode_data_init()
53 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn1bsinitvals24, in brcms_ucode_data_init()
56 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn1initvals24, in brcms_ucode_data_init()
59 brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn2bsinitvals24, in brcms_ucode_data_init()
62 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn2initvals24, in brcms_ucode_data_init()
65 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11n0absinitvals16, in brcms_ucode_data_init()
68 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11n0bsinitvals16, in brcms_ucode_data_init()
71 rc : brcms_ucode_init_buf(wl, (void **)&ucode in brcms_ucode_data_init()
94 brcms_ucode_data_free(struct brcms_ucode *ucode) brcms_ucode_data_free() argument
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ucode.c63 DRM_ERROR("Unknown MC ucode version: %u.%u\n", version_major, version_minor); in amdgpu_ucode_print_mc_hdr()
89 DRM_ERROR("Unknown SMC ucode version: %u.%u\n", version_major, version_minor); in amdgpu_ucode_print_smc_hdr()
110 DRM_ERROR("Unknown GFX ucode version: %u.%u\n", version_major, version_minor); in amdgpu_ucode_print_gfx_hdr()
205 DRM_ERROR("Unknown RLC ucode version: %u.%u\n", version_major, version_minor); in amdgpu_ucode_print_rlc_hdr()
233 DRM_ERROR("Unknown SDMA ucode version: %u.%u\n", in amdgpu_ucode_print_sdma_hdr()
307 DRM_ERROR("Unknown PSP ucode version: %u.%u\n", in amdgpu_ucode_print_psp_hdr()
329 DRM_ERROR("Unknown gpu_info ucode version: %u.%u\n", version_major, version_minor); in amdgpu_ucode_print_gpu_info_hdr()
469 struct amdgpu_firmware_info *ucode, in amdgpu_ucode_init_single_fw()
478 if (NULL == ucode->fw) in amdgpu_ucode_init_single_fw()
481 ucode in amdgpu_ucode_init_single_fw()
468 amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, struct amdgpu_firmware_info *ucode, uint64_t mc_addr, void *kptr) amdgpu_ucode_init_single_fw() argument
584 amdgpu_ucode_patch_jt(struct amdgpu_firmware_info *ucode, uint64_t mc_addr, void *kptr) amdgpu_ucode_patch_jt() argument
637 struct amdgpu_firmware_info *ucode = NULL; amdgpu_ucode_init_bo() local
[all...]
H A Damdgpu_psp.c245 struct amdgpu_firmware_info *ucode, in psp_cmd_submit_buf()
299 if (ucode) in psp_cmd_submit_buf()
300 DRM_WARN("failed to load ucode id (%d) ", in psp_cmd_submit_buf()
301 ucode->ucode_id); in psp_cmd_submit_buf()
314 if (ucode) { in psp_cmd_submit_buf()
315 ucode->tmr_mc_addr_lo = psp->cmd_buf_mem->resp.fw_addr_lo; in psp_cmd_submit_buf()
316 ucode->tmr_mc_addr_hi = psp->cmd_buf_mem->resp.fw_addr_hi; in psp_cmd_submit_buf()
1112 dev_info(psp->adev->dev, "RAS: optional ras ta ucode is not available\n"); in psp_ras_initialize()
1224 dev_info(psp->adev->dev, "HDCP: optional hdcp ta ucode is not available\n"); in psp_hdcp_initialize()
1376 dev_info(psp->adev->dev, "DTM: optional dtm ta ucode i in psp_dtm_initialize()
244 psp_cmd_submit_buf(struct psp_context *psp, struct amdgpu_firmware_info *ucode, struct psp_gfx_cmd_resp *cmd, uint64_t fence_mc_addr) psp_cmd_submit_buf() argument
1697 psp_get_fw_type(struct amdgpu_firmware_info *ucode, enum psp_gfx_fw_type *type) psp_get_fw_type() argument
1811 psp_print_fw_hdr(struct psp_context *psp, struct amdgpu_firmware_info *ucode) psp_print_fw_hdr() argument
1859 psp_prep_load_ip_fw_cmd_buf(struct amdgpu_firmware_info *ucode, struct psp_gfx_cmd_resp *cmd) psp_prep_load_ip_fw_cmd_buf() argument
1879 psp_execute_np_fw_load(struct psp_context *psp, struct amdgpu_firmware_info *ucode) psp_execute_np_fw_load() argument
1898 struct amdgpu_firmware_info *ucode = psp_load_smu_fw() local
1921 fw_load_skip_check(struct psp_context *psp, struct amdgpu_firmware_info *ucode) fw_load_skip_check() argument
1962 struct amdgpu_firmware_info *ucode; psp_np_fw_load() local
2342 struct amdgpu_firmware_info ucode = {0}; psp_update_vcn_sram() local
[all...]
H A Damdgpu_cgs.c213 struct amdgpu_firmware_info *ucode; in amdgpu_cgs_get_firmware_info() local
216 ucode = &adev->firmware.ucode[id]; in amdgpu_cgs_get_firmware_info()
217 if (ucode->fw == NULL) in amdgpu_cgs_get_firmware_info()
220 gpu_addr = ucode->mc_addr; in amdgpu_cgs_get_firmware_info()
221 header = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_cgs_get_firmware_info()
230 info->kptr = ucode->kaddr; in amdgpu_cgs_get_firmware_info()
248 struct amdgpu_firmware_info *ucode = NULL; in amdgpu_cgs_get_firmware_info() local
453 ucode = &adev->firmware.ucode[AMDGPU_UCODE_ID_SM in amdgpu_cgs_get_firmware_info()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ucode.c63 DRM_ERROR("Unknown MC ucode version: %u.%u\n", version_major, version_minor); in amdgpu_ucode_print_mc_hdr()
98 DRM_ERROR("Unknown SMC ucode version: %u.%u\n", version_major, version_minor); in amdgpu_ucode_print_smc_hdr()
125 DRM_ERROR("Unknown GFX ucode version: %u.%u\n", version_major, version_minor); in amdgpu_ucode_print_gfx_hdr()
284 DRM_ERROR("Unknown RLC v2 ucode: v2.%u\n", version_minor); in amdgpu_ucode_print_rlc_hdr()
288 DRM_ERROR("Unknown RLC ucode version: %u.%u\n", version_major, version_minor); in amdgpu_ucode_print_rlc_hdr()
327 DRM_ERROR("Unknown SDMA ucode version: %u.%u\n", in amdgpu_ucode_print_sdma_hdr()
474 DRM_ERROR("Unknown PSP ucode version: %u.%u\n", in amdgpu_ucode_print_psp_hdr()
496 DRM_ERROR("Unknown gpu_info ucode version: %u.%u\n", version_major, version_minor); in amdgpu_ucode_print_gpu_info_hdr()
741 struct amdgpu_firmware_info *ucode, in amdgpu_ucode_init_single_fw()
754 if (!ucode in amdgpu_ucode_init_single_fw()
740 amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, struct amdgpu_firmware_info *ucode, uint64_t mc_addr, void *kptr) amdgpu_ucode_init_single_fw() argument
970 amdgpu_ucode_patch_jt(struct amdgpu_firmware_info *ucode, uint64_t mc_addr, void *kptr) amdgpu_ucode_patch_jt() argument
1023 struct amdgpu_firmware_info *ucode = NULL; amdgpu_ucode_init_bo() local
[all...]
H A Damdgpu_cgs.c213 struct amdgpu_firmware_info *ucode; in amdgpu_cgs_get_firmware_info() local
216 ucode = &adev->firmware.ucode[id]; in amdgpu_cgs_get_firmware_info()
217 if (ucode->fw == NULL) in amdgpu_cgs_get_firmware_info()
220 gpu_addr = ucode->mc_addr; in amdgpu_cgs_get_firmware_info()
221 header = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_cgs_get_firmware_info()
230 info->kptr = ucode->kaddr; in amdgpu_cgs_get_firmware_info()
248 struct amdgpu_firmware_info *ucode = NULL; in amdgpu_cgs_get_firmware_info() local
422 ucode = &adev->firmware.ucode[AMDGPU_UCODE_ID_SM in amdgpu_cgs_get_firmware_info()
[all...]
H A Damdgpu_rlc.c332 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_G]; in amdgpu_gfx_rlc_init_microcode_v2_0()
368 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL]; in amdgpu_gfx_rlc_init_microcode_v2_1()
376 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM]; in amdgpu_gfx_rlc_init_microcode_v2_1()
384 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM]; in amdgpu_gfx_rlc_init_microcode_v2_1()
406 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_IRAM]; in amdgpu_gfx_rlc_init_microcode_v2_2()
414 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_DRAM]; in amdgpu_gfx_rlc_init_microcode_v2_2()
441 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_P]; in amdgpu_gfx_rlc_init_microcode_v2_3()
449 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_V]; in amdgpu_gfx_rlc_init_microcode_v2_3()
477 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_GLOBAL_TAP_DELAYS]; in amdgpu_gfx_rlc_init_microcode_v2_4()
485 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SE0_TAP_DELAY in amdgpu_gfx_rlc_init_microcode_v2_4()
[all...]
H A Dsmu_v13_0_10.c151 struct amdgpu_firmware_info *ucode; in smu_v13_0_10_mode2_restore_ip() local
156 ucode = &adev->firmware.ucode[i]; in smu_v13_0_10_mode2_restore_ip()
158 switch (ucode->ucode_id) { in smu_v13_0_10_mode2_restore_ip()
161 ucode_list[ucode_count++] = ucode; in smu_v13_0_10_mode2_restore_ip()
170 dev_err(adev->dev, "IMU ucode load failed after mode2 reset\n"); in smu_v13_0_10_mode2_restore_ip()
H A Damdgpu_psp.c624 struct amdgpu_firmware_info *ucode, in psp_cmd_submit_buf()
677 if (ucode) in psp_cmd_submit_buf()
678 DRM_WARN("failed to load ucode %s(0x%X) ", in psp_cmd_submit_buf()
679 amdgpu_ucode_name(ucode->ucode_id), ucode->ucode_id); in psp_cmd_submit_buf()
687 if ((ucode && amdgpu_sriov_vf(psp->adev)) || !timeout) { in psp_cmd_submit_buf()
693 if (ucode) { in psp_cmd_submit_buf()
694 ucode->tmr_mc_addr_lo = psp->cmd_buf_mem->resp.fw_addr_lo; in psp_cmd_submit_buf()
695 ucode->tmr_mc_addr_hi = psp->cmd_buf_mem->resp.fw_addr_hi; in psp_cmd_submit_buf()
1612 dev_info(adev->dev, "RAS: optional ras ta ucode i in psp_ras_initialize()
623 psp_cmd_submit_buf(struct psp_context *psp, struct amdgpu_firmware_info *ucode, struct psp_gfx_cmd_resp *cmd, uint64_t fence_mc_addr) psp_cmd_submit_buf() argument
2209 psp_get_fw_type(struct amdgpu_firmware_info *ucode, enum psp_gfx_fw_type *type) psp_get_fw_type() argument
2401 psp_print_fw_hdr(struct psp_context *psp, struct amdgpu_firmware_info *ucode) psp_print_fw_hdr() argument
2449 psp_prep_load_ip_fw_cmd_buf(struct amdgpu_firmware_info *ucode, struct psp_gfx_cmd_resp *cmd) psp_prep_load_ip_fw_cmd_buf() argument
2467 psp_execute_ip_fw_load(struct psp_context *psp, struct amdgpu_firmware_info *ucode) psp_execute_ip_fw_load() argument
2488 struct amdgpu_firmware_info *ucode = psp_load_smu_fw() local
2519 fw_load_skip_check(struct psp_context *psp, struct amdgpu_firmware_info *ucode) fw_load_skip_check() argument
2548 struct amdgpu_firmware_info *ucode; psp_load_fw_list() local
2563 struct amdgpu_firmware_info *ucode; psp_load_non_psp_fw() local
[all...]
/kernel/linux/linux-5.10/drivers/crypto/marvell/octeontx/
H A Dotx_cptpf_ucode.c97 static void set_ucode_filename(struct otx_cpt_ucode *ucode, in set_ucode_filename() argument
100 strlcpy(ucode->filename, filename, OTX_CPT_UCODE_NAME_LENGTH); in set_ucode_filename()
188 eng_grp->g->grp[eng_grp->mirror.idx].ucode[0].align_dma; in cpt_set_ucode_base()
190 dma_addr = eng_grp->ucode[0].align_dma; in cpt_set_ucode_base()
325 set_ucode_filename(&tar_info->ucode, filename); in process_tar_file()
326 memcpy(tar_info->ucode.ver_str, ucode_hdr->ver_str, in process_tar_file()
328 tar_info->ucode.ver_num = ucode_hdr->ver_num; in process_tar_file()
329 tar_info->ucode.type = ucode_type; in process_tar_file()
330 tar_info->ucode.size = ucode_size; in process_tar_file()
360 if (!is_eng_type(curr->ucode in get_uc_from_tar_archive()
503 otx_cpt_uc_supports_eng_type(struct otx_cpt_ucode *ucode, int eng_type) otx_cpt_uc_supports_eng_type() argument
571 print_ucode_dbg_info(struct otx_cpt_ucode *ucode) print_ucode_dbg_info() argument
842 ucode_unload(struct device *dev, struct otx_cpt_ucode *ucode) ucode_unload() argument
860 copy_ucode_to_dma_mem(struct device *dev, struct otx_cpt_ucode *ucode, const u8 *ucode_data) copy_ucode_to_dma_mem() argument
891 ucode_load(struct device *dev, struct otx_cpt_ucode *ucode, const char *ucode_filename) ucode_load() argument
1205 struct otx_cpt_ucode *ucode; update_ucode_ptrs() local
[all...]
H A Dotx_cptpf_mbox.c140 struct otx_cpt_ucode *ucode; in otx_cpt_bind_vq_to_grp() local
165 ucode = &eng_grp->g->grp[eng_grp->mirror.idx].ucode[0]; in otx_cpt_bind_vq_to_grp()
167 ucode = &eng_grp->ucode[0]; in otx_cpt_bind_vq_to_grp()
169 if (otx_cpt_uc_supports_eng_type(ucode, OTX_CPT_SE_TYPES)) in otx_cpt_bind_vq_to_grp()
171 else if (otx_cpt_uc_supports_eng_type(ucode, OTX_CPT_AE_TYPES)) in otx_cpt_bind_vq_to_grp()
H A Dotx_cptpf_ucode.h19 /* CPT ucode name maximum length */
30 /* CPT ucode alignment */
33 /* CPT ucode signature size */
83 * ucode version in readable format
85 struct otx_cpt_ucode_ver_num ver_num;/* ucode version number */
86 char filename[OTX_CPT_UCODE_NAME_LENGTH]; /* ucode filename */
87 dma_addr_t dma; /* phys address of ucode image */
88 dma_addr_t align_dma; /* aligned phys address of ucode image */
89 void *va; /* virt address of ucode image */
90 void *align_va; /* aligned virt address of ucode imag
97 struct otx_cpt_ucode ucode;/* microcode information */ global() member
115 struct otx_cpt_ucode *ucode; /* ucode used by these engines */ global() member
141 struct otx_cpt_ucode ucode[OTX_CPT_MAX_ETYPES_PER_GRP]; global() member
[all...]
/kernel/linux/linux-6.6/drivers/crypto/marvell/octeontx/
H A Dotx_cptpf_ucode.c97 static void set_ucode_filename(struct otx_cpt_ucode *ucode, in set_ucode_filename() argument
100 strscpy(ucode->filename, filename, OTX_CPT_UCODE_NAME_LENGTH); in set_ucode_filename()
188 eng_grp->g->grp[eng_grp->mirror.idx].ucode[0].align_dma; in cpt_set_ucode_base()
190 dma_addr = eng_grp->ucode[0].align_dma; in cpt_set_ucode_base()
325 set_ucode_filename(&tar_info->ucode, filename); in process_tar_file()
326 memcpy(tar_info->ucode.ver_str, ucode_hdr->ver_str, in process_tar_file()
328 tar_info->ucode.ver_num = ucode_hdr->ver_num; in process_tar_file()
329 tar_info->ucode.type = ucode_type; in process_tar_file()
330 tar_info->ucode.size = ucode_size; in process_tar_file()
359 if (!is_eng_type(curr->ucode in get_uc_from_tar_archive()
502 otx_cpt_uc_supports_eng_type(struct otx_cpt_ucode *ucode, int eng_type) otx_cpt_uc_supports_eng_type() argument
570 print_ucode_dbg_info(struct otx_cpt_ucode *ucode) print_ucode_dbg_info() argument
841 ucode_unload(struct device *dev, struct otx_cpt_ucode *ucode) ucode_unload() argument
859 copy_ucode_to_dma_mem(struct device *dev, struct otx_cpt_ucode *ucode, const u8 *ucode_data) copy_ucode_to_dma_mem() argument
890 ucode_load(struct device *dev, struct otx_cpt_ucode *ucode, const char *ucode_filename) ucode_load() argument
1204 struct otx_cpt_ucode *ucode; update_ucode_ptrs() local
[all...]
H A Dotx_cptpf_mbox.c140 struct otx_cpt_ucode *ucode; in otx_cpt_bind_vq_to_grp() local
165 ucode = &eng_grp->g->grp[eng_grp->mirror.idx].ucode[0]; in otx_cpt_bind_vq_to_grp()
167 ucode = &eng_grp->ucode[0]; in otx_cpt_bind_vq_to_grp()
169 if (otx_cpt_uc_supports_eng_type(ucode, OTX_CPT_SE_TYPES)) in otx_cpt_bind_vq_to_grp()
171 else if (otx_cpt_uc_supports_eng_type(ucode, OTX_CPT_AE_TYPES)) in otx_cpt_bind_vq_to_grp()
H A Dotx_cptpf_ucode.h19 /* CPT ucode name maximum length */
30 /* CPT ucode alignment */
33 /* CPT ucode signature size */
83 * ucode version in readable format
85 struct otx_cpt_ucode_ver_num ver_num;/* ucode version number */
86 char filename[OTX_CPT_UCODE_NAME_LENGTH]; /* ucode filename */
87 dma_addr_t dma; /* phys address of ucode image */
88 dma_addr_t align_dma; /* aligned phys address of ucode image */
89 void *va; /* virt address of ucode image */
90 void *align_va; /* aligned virt address of ucode imag
97 struct otx_cpt_ucode ucode;/* microcode information */ global() member
115 struct otx_cpt_ucode *ucode; /* ucode used by these engines */ global() member
141 struct otx_cpt_ucode ucode[OTX_CPT_MAX_ETYPES_PER_GRP]; global() member
[all...]
/kernel/linux/linux-6.6/drivers/crypto/marvell/octeontx2/
H A Dotx2_cptpf_ucode.c62 if (eng_grp->ucode[1].type) in is_2nd_ucode_used()
68 static void set_ucode_filename(struct otx2_cpt_ucode *ucode, in set_ucode_filename() argument
71 strscpy(ucode->filename, filename, OTX2_CPT_NAME_LENGTH); in set_ucode_filename()
185 dma_addr = engs->ucode->dma; in cptx_set_ucode_base()
389 set_ucode_filename(&uc_info->ucode, filename); in load_fw()
390 memcpy(uc_info->ucode.ver_str, ucode_hdr->ver_str, in load_fw()
392 uc_info->ucode.ver_num = ucode_hdr->ver_num; in load_fw()
393 uc_info->ucode.type = ucode_type; in load_fw()
394 uc_info->ucode.size = ucode_size; in load_fw()
426 if (!is_eng_type(curr->ucode in get_ucode()
669 ucode_unload(struct device *dev, struct otx2_cpt_ucode *ucode) ucode_unload() argument
685 copy_ucode_to_dma_mem(struct device *dev, struct otx2_cpt_ucode *ucode, const u8 *ucode_data) copy_ucode_to_dma_mem() argument
957 struct otx2_cpt_ucode *ucode; update_ucode_ptrs() local
[all...]
H A Dotx2_cptpf_ucode.h15 * On OcteonTX2 platform IPSec ucode can use both IE and SE engines therefore
20 /* CPT ucode signature size */
77 * ucode version in readable
80 struct otx2_cpt_ucode_ver_num ver_num;/* ucode version number */
81 char filename[OTX2_CPT_NAME_LENGTH];/* ucode filename */
82 dma_addr_t dma; /* phys address of ucode image */
83 void *va; /* virt address of ucode image */
84 u32 size; /* ucode image size */
85 int type; /* ucode image type SE, IE, AE or SE+IE */
90 struct otx2_cpt_ucode ucode;/* microcod member
110 struct otx2_cpt_ucode *ucode; /* ucode used by these engines */ global() member
135 struct otx2_cpt_ucode ucode[OTX2_CPT_MAX_ETYPES_PER_GRP]; global() member
[all...]
/kernel/linux/linux-5.10/drivers/soc/fsl/qe/
H A Dqe.c405 const struct qe_microcode *ucode) in qe_upload_microcode()
407 const __be32 *code = base + be32_to_cpu(ucode->code_offset); in qe_upload_microcode()
410 if (ucode->major || ucode->minor || ucode->revision) in qe_upload_microcode()
413 ucode->id, ucode->major, ucode->minor, ucode->revision); in qe_upload_microcode()
416 "uploading microcode '%s'\n", ucode in qe_upload_microcode()
404 qe_upload_microcode(const void *base, const struct qe_microcode *ucode) qe_upload_microcode() argument
534 const struct qe_microcode *ucode = &firmware->microcode[i]; qe_upload_firmware() local
[all...]
/kernel/linux/linux-6.6/drivers/soc/fsl/qe/
H A Dqe.c406 const struct qe_microcode *ucode) in qe_upload_microcode()
408 const __be32 *code = base + be32_to_cpu(ucode->code_offset); in qe_upload_microcode()
411 if (ucode->major || ucode->minor || ucode->revision) in qe_upload_microcode()
414 ucode->id, ucode->major, ucode->minor, ucode->revision); in qe_upload_microcode()
417 "uploading microcode '%s'\n", ucode in qe_upload_microcode()
405 qe_upload_microcode(const void *base, const struct qe_microcode *ucode) qe_upload_microcode() argument
535 const struct qe_microcode *ucode = &firmware->microcode[i]; qe_upload_firmware() local
[all...]
/kernel/linux/linux-5.10/drivers/crypto/cavium/nitrox/
H A Dnitrox_main.c62 * struct ucode - Firmware Header
69 struct ucode { struct
123 struct ucode *ucode; in nitrox_load_fw() local
141 ucode = (struct ucode *)fw->data; in nitrox_load_fw()
143 ucode_size = be32_to_cpu(ucode->code_size) * 2; in nitrox_load_fw()
145 dev_err(DEV(ndev), "Invalid ucode size: %u for firmware %s\n", in nitrox_load_fw()
150 ucode_data = ucode->code; in nitrox_load_fw()
153 memcpy(&ndev->hw.fw_name[0][0], ucode in nitrox_load_fw()
[all...]
/kernel/linux/linux-6.6/drivers/crypto/cavium/nitrox/
H A Dnitrox_main.c52 * struct ucode - Firmware Header
59 struct ucode { struct
113 struct ucode *ucode; in nitrox_load_fw() local
131 ucode = (struct ucode *)fw->data; in nitrox_load_fw()
133 ucode_size = be32_to_cpu(ucode->code_size) * 2; in nitrox_load_fw()
135 dev_err(DEV(ndev), "Invalid ucode size: %u for firmware %s\n", in nitrox_load_fw()
140 ucode_data = ucode->code; in nitrox_load_fw()
143 memcpy(&ndev->hw.fw_name[0][0], ucode in nitrox_load_fw()
[all...]
/kernel/linux/linux-5.10/drivers/input/touchscreen/
H A Dhideep.c412 const __be32 *ucode, size_t xfer_count) in hideep_program_page()
438 val = be32_to_cpu(ucode[0]); in hideep_program_page()
442 ucode, xfer_count); in hideep_program_page()
444 val = be32_to_cpu(ucode[xfer_count - 1]); in hideep_program_page()
461 const __be32 *ucode, size_t ucode_len) in hideep_program_nvm()
476 xfer_count = xfer_len / sizeof(*ucode); in hideep_program_nvm()
488 if (memcmp(ucode, current_ucode, xfer_len)) { in hideep_program_nvm()
490 ucode, xfer_count); in hideep_program_nvm()
501 ucode += xfer_count; in hideep_program_nvm()
510 const __be32 *ucode, size_ in hideep_verify_nvm()
411 hideep_program_page(struct hideep_ts *ts, u32 addr, const __be32 *ucode, size_t xfer_count) hideep_program_page() argument
460 hideep_program_nvm(struct hideep_ts *ts, const __be32 *ucode, size_t ucode_len) hideep_program_nvm() argument
509 hideep_verify_nvm(struct hideep_ts *ts, const __be32 *ucode, size_t ucode_len) hideep_verify_nvm() argument
605 hideep_flash_firmware(struct hideep_ts *ts, const __be32 *ucode, size_t ucode_len) hideep_flash_firmware() argument
623 hideep_update_firmware(struct hideep_ts *ts, const __be32 *ucode, size_t ucode_len) hideep_update_firmware() argument
[all...]
/kernel/linux/linux-6.6/drivers/input/touchscreen/
H A Dhideep.c418 const __be32 *ucode, size_t xfer_count) in hideep_program_page()
444 val = be32_to_cpu(ucode[0]); in hideep_program_page()
448 ucode, xfer_count); in hideep_program_page()
450 val = be32_to_cpu(ucode[xfer_count - 1]); in hideep_program_page()
467 const __be32 *ucode, size_t ucode_len) in hideep_program_nvm()
482 xfer_count = xfer_len / sizeof(*ucode); in hideep_program_nvm()
494 if (memcmp(ucode, current_ucode, xfer_len)) { in hideep_program_nvm()
496 ucode, xfer_count); in hideep_program_nvm()
507 ucode += xfer_count; in hideep_program_nvm()
516 const __be32 *ucode, size_ in hideep_verify_nvm()
417 hideep_program_page(struct hideep_ts *ts, u32 addr, const __be32 *ucode, size_t xfer_count) hideep_program_page() argument
466 hideep_program_nvm(struct hideep_ts *ts, const __be32 *ucode, size_t ucode_len) hideep_program_nvm() argument
515 hideep_verify_nvm(struct hideep_ts *ts, const __be32 *ucode, size_t ucode_len) hideep_verify_nvm() argument
611 hideep_flash_firmware(struct hideep_ts *ts, const __be32 *ucode, size_t ucode_len) hideep_flash_firmware() argument
629 hideep_update_firmware(struct hideep_ts *ts, const __be32 *ucode, size_t ucode_len) hideep_update_firmware() argument
[all...]
/kernel/linux/linux-5.10/arch/x86/kernel/cpu/microcode/
H A Damd.c292 * This scans the ucode blob for the proper container as we can have multiple
298 static size_t parse_container(u8 *ucode, size_t size, struct cont_desc *desc) in parse_container() argument
302 u32 *hdr = (u32 *)ucode; in parse_container()
306 if (!verify_equivalence_table(ucode, size, true)) in parse_container()
309 buf = ucode; in parse_container()
358 * container which has a patch for this CPU so return 0 to mean, @ucode in parse_container()
364 desc->data = ucode; in parse_container()
375 * Scan the ucode blob for the proper container as we can have multiple
378 static void scan_containers(u8 *ucode, size_t size, struct cont_desc *desc) in scan_containers() argument
381 size_t s = parse_container(ucode, siz in scan_containers()
421 apply_microcode_early_amd(u32 cpuid_1_eax, void *ucode, size_t size, bool save_patch) apply_microcode_early_amd() argument
[all...]

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