| /kernel/linux/linux-5.10/arch/powerpc/mm/book3s64/ |
| H A D | hash_native.c | 180 asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2) in ___tlbie()
199 asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2) in ___tlbie()
223 * re-order the tlbie in fixup_tlbie_vpn()
233 /* Need the extra ptesync to ensure we don't reorder tlbie*/ in fixup_tlbie_vpn()
298 static inline void tlbie(unsigned long vpn, int psize, int apsize, in tlbie() function
487 tlbie(vpn, bpsize, apsize, ssize, local); in native_hpte_updatepp()
569 tlbie(vpn, psize, psize, ssize, 0); in native_hpte_updateboltedpp()
599 tlbie(vpn, psize, psize, ssize, 0); in native_hpte_removebolted()
637 tlbie(vpn, bpsize, apsize, ssize, local); in native_hpte_invalidate()
696 * We need to do tlb invalidate for all the address, tlbie in native_hugepage_invalidate()
[all...] |
| /kernel/linux/linux-6.6/arch/powerpc/mm/book3s64/ |
| H A D | hash_native.c | 99 asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2) in ___tlbie()
118 asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2) in ___tlbie()
142 * re-order the tlbie in fixup_tlbie_vpn()
152 /* Need the extra ptesync to ensure we don't reorder tlbie*/ in fixup_tlbie_vpn()
217 static inline void tlbie(unsigned long vpn, int psize, int apsize, in tlbie() function
425 tlbie(vpn, bpsize, apsize, ssize, local); in native_hpte_updatepp()
512 tlbie(vpn, psize, psize, ssize, 0); in native_hpte_updateboltedpp()
547 tlbie(vpn, psize, psize, ssize, 0); in native_hpte_removebolted()
589 tlbie(vpn, bpsize, apsize, ssize, local); in native_hpte_invalidate()
646 * We need to do tlb invalidate for all the address, tlbie in native_hugepage_invalidate()
[all...] |
| /kernel/linux/linux-5.10/arch/powerpc/mm/book3s32/ |
| H A D | hash_low.S | 351 tlbie r4
448 * Between the tlbie above and updating the hash table entry below,
456 * PTE in their TLB. So we don't need to bother with another tlbie here,
458 * address. :-) The tlbie above is mainly to make sure that this CPU comes
610 tlbie r4 /* in hw tlb too */
658 tlbie r3
666 tlbie r3
697 0: tlbie r4
|
| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| H A D | head_8xx.S | 195 tlbie addr; \
197 tlbie addr; \
331 tlbie r4
357 tlbie r4
610 tlbie r0
631 sync /* wait for tlbia/tlbie to finish */
|
| H A D | swsusp_32.S | 364 tlbie r4
|
| /kernel/linux/linux-6.6/arch/powerpc/kernel/ |
| H A D | head_8xx.S | 185 tlbie tmp; \
187 tlbie tmp
317 tlbie r12
342 tlbie r4
584 tlbie r0
601 sync /* wait for tlbia/tlbie to finish */
|
| H A D | swsusp_32.S | 366 tlbie r4
|
| /kernel/linux/linux-5.10/arch/powerpc/kvm/ |
| H A D | book3s_pr_papr.c | 114 vcpu->arch.mmu.tlbie(vcpu, rb, rb & 1 ? true : false); in kvmppc_h_pr_remove()
202 vcpu->arch.mmu.tlbie(vcpu, rb, rb & 1 ? true : false); in kvmppc_h_pr_bulk_remove()
247 vcpu->arch.mmu.tlbie(vcpu, rb, rb & 1 ? true : false); in kvmppc_h_pr_protect()
|
| H A D | book3s_32_mmu.c | 404 mmu->tlbie = kvmppc_mmu_book3s_32_tlbie; in kvmppc_mmu_book3s_32_init()
|
| H A D | book3s_64_mmu.c | 537 dprintk("KVM MMU: tlbie(0x%lx)\n", va); in kvmppc_mmu_book3s_64_tlbie()
540 * The tlbie instruction changed behaviour starting with in kvmppc_mmu_book3s_64_tlbie()
665 mmu->tlbie = kvmppc_mmu_book3s_64_tlbie; in kvmppc_mmu_book3s_64_init()
|
| H A D | book3s_emulate.c | 355 vcpu->arch.mmu.tlbie(vcpu, addr, large); in kvmppc_core_emulate_op_pr()
|
| /kernel/linux/linux-6.6/arch/powerpc/kvm/ |
| H A D | book3s_pr_papr.c | 114 vcpu->arch.mmu.tlbie(vcpu, rb, rb & 1 ? true : false); in kvmppc_h_pr_remove()
202 vcpu->arch.mmu.tlbie(vcpu, rb, rb & 1 ? true : false); in kvmppc_h_pr_bulk_remove()
247 vcpu->arch.mmu.tlbie(vcpu, rb, rb & 1 ? true : false); in kvmppc_h_pr_protect()
|
| H A D | book3s_32_mmu.c | 404 mmu->tlbie = kvmppc_mmu_book3s_32_tlbie; in kvmppc_mmu_book3s_32_init()
|
| H A D | book3s_64_mmu.c | 536 dprintk("KVM MMU: tlbie(0x%lx)\n", va); in kvmppc_mmu_book3s_64_tlbie()
539 * The tlbie instruction changed behaviour starting with in kvmppc_mmu_book3s_64_tlbie()
664 mmu->tlbie = kvmppc_mmu_book3s_64_tlbie; in kvmppc_mmu_book3s_64_init()
|
| H A D | book3s_emulate.c | 351 vcpu->arch.mmu.tlbie(vcpu, addr, large); in kvmppc_core_emulate_op_pr()
|
| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| H A D | trace.h | 188 TRACE_EVENT(tlbie,
|
| H A D | kvm_host.h | 412 void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large); member
|
| H A D | ppc_asm.h | 421 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
433 0: tlbie r4; \
|
| /kernel/linux/linux-6.6/arch/powerpc/mm/book3s32/ |
| H A D | hash_low.S | 347 tlbie r4
417 * Between the tlbie above and updating the hash table entry below,
425 * PTE in their TLB. So we don't need to bother with another tlbie here,
427 * address. :-) The tlbie above is mainly to make sure that this CPU comes
573 tlbie r4 /* in hw tlb too */
|
| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| H A D | trace.h | 291 TRACE_EVENT(tlbie,
|
| H A D | kvm_host.h | 403 void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large); member
|
| H A D | ppc_asm.h | 478 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
490 0: tlbie r4; \
|
| /kernel/linux/linux-5.10/arch/powerpc/platforms/powermac/ |
| H A D | sleep.S | 395 tlbie r4
|
| /kernel/linux/linux-6.6/arch/powerpc/platforms/powermac/ |
| H A D | sleep.S | 395 tlbie r4
|
| /kernel/linux/linux-5.10/tools/testing/selftests/powerpc/primitives/asm/ |
| H A D | ppc_asm.h | 421 * the 403GCX and 405GP tlbia IS defined and tlbie is not.
433 0: tlbie r4; \
|