| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| H A D | intel_fb.c | 693 unsigned int *tile_width, in intel_tile_dims()
699 *tile_width = tile_width_bytes / cpp; in intel_tile_dims()
709 unsigned int *tile_width, in intel_tile_block_dims()
712 intel_tile_dims(fb, color_plane, tile_width, tile_height); in intel_tile_block_dims()
720 unsigned int tile_width, tile_height; in intel_tile_row_size() local
722 intel_tile_dims(fb, color_plane, &tile_width, &tile_height); in intel_tile_row_size()
910 unsigned int tile_width, in intel_adjust_tile_offset()
917 unsigned int pitch_pixels = pitch_tiles * tile_width; in intel_adjust_tile_offset()
927 *x += tiles % pitch_tiles * tile_width; in intel_adjust_tile_offset()
963 unsigned int tile_size, tile_width, tile_heigh in intel_adjust_aligned_offset() local
692 intel_tile_dims(const struct drm_framebuffer *fb, int color_plane, unsigned int *tile_width, unsigned int *tile_height) intel_tile_dims() argument
708 intel_tile_block_dims(const struct drm_framebuffer *fb, int color_plane, unsigned int *tile_width, unsigned int *tile_height) intel_tile_block_dims() argument
909 intel_adjust_tile_offset(int *x, int *y, unsigned int tile_width, unsigned int tile_height, unsigned int tile_size, unsigned int pitch_tiles, u32 old_offset, u32 new_offset) intel_adjust_tile_offset() argument
1028 unsigned int tile_size, tile_width, tile_height; intel_compute_aligned_offset() local
1146 int tile_width, tile_height; intel_fb_check_ccs_xy() local
1329 unsigned int tile_width, tile_height; global() member
1366 plane_view_scanout_stride(const struct intel_framebuffer *fb, int color_plane, unsigned int tile_width, unsigned int src_stride_tiles, unsigned int dst_stride_tiles) plane_view_scanout_stride() argument
1431 unsigned int tile_width = dims->tile_width; calc_plane_remap_info() local
1776 u32 tile_width; intel_fb_stride_alignment() local
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gem/ |
| H A D | i915_gem_tiling.c | 121 unsigned int tile_width; in i915_tiling_ok() local
149 tile_width = 128; in i915_tiling_ok()
151 tile_width = 512; in i915_tiling_ok()
153 if (!stride || !IS_ALIGNED(stride, tile_width)) in i915_tiling_ok()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gem/ |
| H A D | i915_gem_tiling.c | 123 unsigned int tile_width; in i915_tiling_ok() local
151 tile_width = 128; in i915_tiling_ok()
153 tile_width = 512; in i915_tiling_ok()
155 if (!stride || !IS_ALIGNED(stride, tile_width)) in i915_tiling_ok()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_hw_mdss.h | 351 * @tile_width: format tile width
368 u16 tile_width; member
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| /kernel/linux/linux-5.10/drivers/staging/media/allegro-dvt/ |
| H A D | allegro-mail.h | 255 s32 tile_width[4]; member
|
| H A D | allegro-mail.c | 432 msg->tile_width[j] = src[i++]; in allegro_dec_encode_frame()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_hw_mdss.h | 379 * @tile_width: format tile width
396 u16 tile_width; member
|
| /kernel/linux/linux-6.6/drivers/media/platform/allegro-dvt/ |
| H A D | allegro-mail.h | 258 s32 tile_width[4]; member
|
| H A D | allegro-mail.c | 438 msg->tile_width[j] = src[i++]; in allegro_dec_encode_frame()
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| H A D | allegro-core.c | 1893 pps->column_width_minus1[i] = msg->tile_width[i] - 1; in allegro_hevc_write_pps()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| H A D | intel_display.c | 2082 unsigned int *tile_width, in intel_tile_dims()
2088 *tile_width = tile_width_bytes / cpp; in intel_tile_dims()
2095 unsigned int tile_width, tile_height; in intel_tile_row_size() local
2097 intel_tile_dims(fb, color_plane, &tile_width, &tile_height); in intel_tile_row_size()
2362 unsigned int tile_width, in intel_adjust_tile_offset()
2369 unsigned int pitch_pixels = pitch_tiles * tile_width; in intel_adjust_tile_offset()
2379 *x += tiles % pitch_tiles * tile_width; in intel_adjust_tile_offset()
2407 unsigned int tile_size, tile_width, tile_height; in intel_adjust_aligned_offset() local
2411 intel_tile_dims(fb, color_plane, &tile_width, &tile_height); in intel_adjust_aligned_offset()
2415 swap(tile_width, tile_heigh in intel_adjust_aligned_offset()
2081 intel_tile_dims(const struct drm_framebuffer *fb, int color_plane, unsigned int *tile_width, unsigned int *tile_height) intel_tile_dims() argument
2361 intel_adjust_tile_offset(int *x, int *y, unsigned int tile_width, unsigned int tile_height, unsigned int tile_size, unsigned int pitch_tiles, u32 old_offset, u32 new_offset) intel_adjust_tile_offset() argument
2474 unsigned int tile_size, tile_width, tile_height; intel_compute_aligned_offset() local
2763 u32 tile_width; intel_fb_stride_alignment() local
2921 int tile_width, tile_height; intel_fb_check_ccs_xy() local
2978 setup_fb_rotation(int plane, const struct intel_remapped_plane_info *plane_info, u32 gtt_offset_rotated, int x, int y, unsigned int width, unsigned int height, unsigned int tile_size, unsigned int tile_width, unsigned int tile_height, struct drm_framebuffer *fb) setup_fb_rotation() argument
3099 unsigned int tile_width, tile_height; intel_fill_fb_info() local
3185 unsigned int tile_width, tile_height; intel_plane_remap_gtt() local
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| H A D | r600_cs.c | 255 u32 tile_width = 8; in r600_get_array_mode_alignment() local
259 u32 tile_bytes = tile_width * tile_height * values->blocksize * values->nsamples; in r600_get_array_mode_alignment()
264 /* technically tile_width/_height for pitch/height */ in r600_get_array_mode_alignment()
265 *pitch_align = 1; /* tile_width */ in r600_get_array_mode_alignment()
277 *pitch_align = max((u32)tile_width, in r600_get_array_mode_alignment()
285 *pitch_align = max((u32)macro_tile_width * tile_width, in r600_get_array_mode_alignment()
287 (values->blocksize * values->nsamples * tile_width))); in r600_get_array_mode_alignment()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| H A D | r600_cs.c | 254 u32 tile_width = 8; in r600_get_array_mode_alignment() local
258 u32 tile_bytes = tile_width * tile_height * values->blocksize * values->nsamples; in r600_get_array_mode_alignment()
263 /* technically tile_width/_height for pitch/height */ in r600_get_array_mode_alignment()
264 *pitch_align = 1; /* tile_width */ in r600_get_array_mode_alignment()
276 *pitch_align = max((u32)tile_width, in r600_get_array_mode_alignment()
284 *pitch_align = max((u32)macro_tile_width * tile_width, in r600_get_array_mode_alignment()
286 (values->blocksize * values->nsamples * tile_width))); in r600_get_array_mode_alignment()
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