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Searched refs:tile (Results 1 - 25 of 144) sorted by relevance

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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dnv20.c31 u32 flags, struct nvkm_fb_tile *tile) in nv20_fb_tile_init()
33 tile->addr = 0x00000001 | addr; in nv20_fb_tile_init()
34 tile->limit = max(1u, addr + size) - 1; in nv20_fb_tile_init()
35 tile->pitch = pitch; in nv20_fb_tile_init()
37 fb->func->tile.comp(fb, i, size, flags, tile); in nv20_fb_tile_init()
38 tile->addr |= 2; in nv20_fb_tile_init()
44 struct nvkm_fb_tile *tile) in nv20_fb_tile_comp()
48 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) { in nv20_fb_tile_comp()
49 if (!(flags & 2)) tile in nv20_fb_tile_comp()
30 nv20_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) nv20_fb_tile_init() argument
43 nv20_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv20_fb_tile_comp() argument
60 nv20_fb_tile_fini(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) nv20_fb_tile_fini() argument
70 nv20_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) nv20_fb_tile_prog() argument
[all...]
H A Dnv30.c31 u32 flags, struct nvkm_fb_tile *tile) in nv30_fb_tile_init()
35 tile->addr = (0 << 4); in nv30_fb_tile_init()
37 if (fb->func->tile.comp) /* z compression */ in nv30_fb_tile_init()
38 fb->func->tile.comp(fb, i, size, flags, tile); in nv30_fb_tile_init()
39 tile->addr = (1 << 4); in nv30_fb_tile_init()
42 tile->addr |= 0x00000001; /* enable */ in nv30_fb_tile_init()
43 tile->addr |= addr; in nv30_fb_tile_init()
44 tile->limit = max(1u, addr + size) - 1; in nv30_fb_tile_init()
45 tile in nv30_fb_tile_init()
30 nv30_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) nv30_fb_tile_init() argument
49 nv30_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv30_fb_tile_comp() argument
[all...]
H A Dnv10.c31 u32 flags, struct nvkm_fb_tile *tile) in nv10_fb_tile_init()
33 tile->addr = 0x80000000 | addr; in nv10_fb_tile_init()
34 tile->limit = max(1u, addr + size) - 1; in nv10_fb_tile_init()
35 tile->pitch = pitch; in nv10_fb_tile_init()
39 nv10_fb_tile_fini(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv10_fb_tile_fini() argument
41 tile->addr = 0; in nv10_fb_tile_fini()
42 tile->limit = 0; in nv10_fb_tile_fini()
43 tile->pitch = 0; in nv10_fb_tile_fini()
44 tile->zcomp = 0; in nv10_fb_tile_fini()
48 nv10_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv10_fb_tile_prog() argument
30 nv10_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) nv10_fb_tile_init() argument
[all...]
H A Dnv35.c31 struct nvkm_fb_tile *tile) in nv35_fb_tile_comp()
35 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) { in nv35_fb_tile_comp()
36 if (flags & 2) tile->zcomp |= 0x04000000; /* Z16 */ in nv35_fb_tile_comp()
37 else tile->zcomp |= 0x08000000; /* Z24S8 */ in nv35_fb_tile_comp()
38 tile->zcomp |= ((tile->tag->offset ) >> 6); in nv35_fb_tile_comp()
39 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 13; in nv35_fb_tile_comp()
41 tile->zcomp |= 0x40000000; in nv35_fb_tile_comp()
50 .tile
30 nv35_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv35_fb_tile_comp() argument
[all...]
H A Dnv36.c31 struct nvkm_fb_tile *tile) in nv36_fb_tile_comp()
35 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) { in nv36_fb_tile_comp()
36 if (flags & 2) tile->zcomp |= 0x10000000; /* Z16 */ in nv36_fb_tile_comp()
37 else tile->zcomp |= 0x20000000; /* Z24S8 */ in nv36_fb_tile_comp()
38 tile->zcomp |= ((tile->tag->offset ) >> 6); in nv36_fb_tile_comp()
39 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 14; in nv36_fb_tile_comp()
41 tile->zcomp |= 0x80000000; in nv36_fb_tile_comp()
50 .tile
30 nv36_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv36_fb_tile_comp() argument
[all...]
H A Dnv25.c31 struct nvkm_fb_tile *tile) in nv25_fb_tile_comp()
35 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) { in nv25_fb_tile_comp()
36 if (!(flags & 2)) tile->zcomp = 0x00100000; /* Z16 */ in nv25_fb_tile_comp()
37 else tile->zcomp = 0x00200000; /* Z24S8 */ in nv25_fb_tile_comp()
38 tile->zcomp |= tile->tag->offset; in nv25_fb_tile_comp()
40 tile->zcomp |= 0x01000000; in nv25_fb_tile_comp()
48 .tile.regions = 8,
49 .tile.init = nv20_fb_tile_init,
50 .tile
30 nv25_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv25_fb_tile_comp() argument
[all...]
H A Dnv44.c31 u32 flags, struct nvkm_fb_tile *tile) in nv44_fb_tile_init()
33 tile->addr = 0x00000001; /* mode = vram */ in nv44_fb_tile_init()
34 tile->addr |= addr; in nv44_fb_tile_init()
35 tile->limit = max(1u, addr + size) - 1; in nv44_fb_tile_init()
36 tile->pitch = pitch; in nv44_fb_tile_init()
40 nv44_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv44_fb_tile_prog() argument
43 nvkm_wr32(device, 0x100604 + (i * 0x10), tile->limit); in nv44_fb_tile_prog()
44 nvkm_wr32(device, 0x100608 + (i * 0x10), tile->pitch); in nv44_fb_tile_prog()
45 nvkm_wr32(device, 0x100600 + (i * 0x10), tile->addr); in nv44_fb_tile_prog()
60 .tile
30 nv44_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) nv44_fb_tile_init() argument
[all...]
H A Dnv40.c31 struct nvkm_fb_tile *tile) in nv40_fb_tile_comp()
36 !nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) { in nv40_fb_tile_comp()
37 tile->zcomp = 0x28000000; /* Z24S8_SPLIT_GRAD */ in nv40_fb_tile_comp()
38 tile->zcomp |= ((tile->tag->offset ) >> 8); in nv40_fb_tile_comp()
39 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 8) << 13; in nv40_fb_tile_comp()
41 tile->zcomp |= 0x40000000; in nv40_fb_tile_comp()
56 .tile.regions = 8,
57 .tile
30 nv40_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv40_fb_tile_comp() argument
[all...]
H A Dnv46.c31 u32 flags, struct nvkm_fb_tile *tile) in nv46_fb_tile_init()
34 if (!(flags & 4)) tile->addr = (0 << 3); in nv46_fb_tile_init()
35 else tile->addr = (1 << 3); in nv46_fb_tile_init()
37 tile->addr |= 0x00000001; /* mode = vram */ in nv46_fb_tile_init()
38 tile->addr |= addr; in nv46_fb_tile_init()
39 tile->limit = max(1u, addr + size) - 1; in nv46_fb_tile_init()
40 tile->pitch = pitch; in nv46_fb_tile_init()
46 .tile.regions = 15,
47 .tile.init = nv46_fb_tile_init,
48 .tile
30 nv46_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) nv46_fb_tile_init() argument
[all...]
H A Dnv41.c30 nv41_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv41_fb_tile_prog() argument
33 nvkm_wr32(device, 0x100604 + (i * 0x10), tile->limit); in nv41_fb_tile_prog()
34 nvkm_wr32(device, 0x100608 + (i * 0x10), tile->pitch); in nv41_fb_tile_prog()
35 nvkm_wr32(device, 0x100600 + (i * 0x10), tile->addr); in nv41_fb_tile_prog()
37 nvkm_wr32(device, 0x100700 + (i * 0x04), tile->zcomp); in nv41_fb_tile_prog()
50 .tile.regions = 12,
51 .tile.init = nv30_fb_tile_init,
52 .tile.comp = nv40_fb_tile_comp,
53 .tile.fini = nv20_fb_tile_fini,
54 .tile
[all...]
H A Dbase.c35 nvkm_fb_tile_fini(struct nvkm_fb *fb, int region, struct nvkm_fb_tile *tile) in nvkm_fb_tile_fini() argument
37 fb->func->tile.fini(fb, region, tile); in nvkm_fb_tile_fini()
42 u32 pitch, u32 flags, struct nvkm_fb_tile *tile) in nvkm_fb_tile_init()
44 fb->func->tile.init(fb, region, addr, size, pitch, flags, tile); in nvkm_fb_tile_init()
48 nvkm_fb_tile_prog(struct nvkm_fb *fb, int region, struct nvkm_fb_tile *tile) in nvkm_fb_tile_prog() argument
51 if (fb->func->tile.prog) { in nvkm_fb_tile_prog()
52 fb->func->tile.prog(fb, region, tile); in nvkm_fb_tile_prog()
41 nvkm_fb_tile_init(struct nvkm_fb *fb, int region, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) nvkm_fb_tile_init() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dnv20.c31 u32 flags, struct nvkm_fb_tile *tile) in nv20_fb_tile_init()
33 tile->addr = 0x00000001 | addr; in nv20_fb_tile_init()
34 tile->limit = max(1u, addr + size) - 1; in nv20_fb_tile_init()
35 tile->pitch = pitch; in nv20_fb_tile_init()
37 fb->func->tile.comp(fb, i, size, flags, tile); in nv20_fb_tile_init()
38 tile->addr |= 2; in nv20_fb_tile_init()
44 struct nvkm_fb_tile *tile) in nv20_fb_tile_comp()
48 if (!nvkm_mm_head(&fb->tags.mm, 0, 1, tags, tags, 1, &tile->tag)) { in nv20_fb_tile_comp()
49 if (!(flags & 2)) tile in nv20_fb_tile_comp()
30 nv20_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) nv20_fb_tile_init() argument
43 nv20_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv20_fb_tile_comp() argument
60 nv20_fb_tile_fini(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) nv20_fb_tile_fini() argument
70 nv20_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) nv20_fb_tile_prog() argument
[all...]
H A Dnv30.c31 u32 flags, struct nvkm_fb_tile *tile) in nv30_fb_tile_init()
35 tile->addr = (0 << 4); in nv30_fb_tile_init()
37 if (fb->func->tile.comp) /* z compression */ in nv30_fb_tile_init()
38 fb->func->tile.comp(fb, i, size, flags, tile); in nv30_fb_tile_init()
39 tile->addr = (1 << 4); in nv30_fb_tile_init()
42 tile->addr |= 0x00000001; /* enable */ in nv30_fb_tile_init()
43 tile->addr |= addr; in nv30_fb_tile_init()
44 tile->limit = max(1u, addr + size) - 1; in nv30_fb_tile_init()
45 tile in nv30_fb_tile_init()
30 nv30_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) nv30_fb_tile_init() argument
49 nv30_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv30_fb_tile_comp() argument
[all...]
H A Dnv10.c31 u32 flags, struct nvkm_fb_tile *tile) in nv10_fb_tile_init()
33 tile->addr = 0x80000000 | addr; in nv10_fb_tile_init()
34 tile->limit = max(1u, addr + size) - 1; in nv10_fb_tile_init()
35 tile->pitch = pitch; in nv10_fb_tile_init()
39 nv10_fb_tile_fini(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv10_fb_tile_fini() argument
41 tile->addr = 0; in nv10_fb_tile_fini()
42 tile->limit = 0; in nv10_fb_tile_fini()
43 tile->pitch = 0; in nv10_fb_tile_fini()
44 tile->zcomp = 0; in nv10_fb_tile_fini()
48 nv10_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv10_fb_tile_prog() argument
30 nv10_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) nv10_fb_tile_init() argument
[all...]
H A Dnv35.c31 struct nvkm_fb_tile *tile) in nv35_fb_tile_comp()
35 if (!nvkm_mm_head(&fb->tags.mm, 0, 1, tags, tags, 1, &tile->tag)) { in nv35_fb_tile_comp()
36 if (flags & 2) tile->zcomp |= 0x04000000; /* Z16 */ in nv35_fb_tile_comp()
37 else tile->zcomp |= 0x08000000; /* Z24S8 */ in nv35_fb_tile_comp()
38 tile->zcomp |= ((tile->tag->offset ) >> 6); in nv35_fb_tile_comp()
39 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 13; in nv35_fb_tile_comp()
41 tile->zcomp |= 0x40000000; in nv35_fb_tile_comp()
50 .tile
30 nv35_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv35_fb_tile_comp() argument
[all...]
H A Dnv36.c31 struct nvkm_fb_tile *tile) in nv36_fb_tile_comp()
35 if (!nvkm_mm_head(&fb->tags.mm, 0, 1, tags, tags, 1, &tile->tag)) { in nv36_fb_tile_comp()
36 if (flags & 2) tile->zcomp |= 0x10000000; /* Z16 */ in nv36_fb_tile_comp()
37 else tile->zcomp |= 0x20000000; /* Z24S8 */ in nv36_fb_tile_comp()
38 tile->zcomp |= ((tile->tag->offset ) >> 6); in nv36_fb_tile_comp()
39 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 14; in nv36_fb_tile_comp()
41 tile->zcomp |= 0x80000000; in nv36_fb_tile_comp()
50 .tile
30 nv36_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv36_fb_tile_comp() argument
[all...]
H A Dnv25.c31 struct nvkm_fb_tile *tile) in nv25_fb_tile_comp()
35 if (!nvkm_mm_head(&fb->tags.mm, 0, 1, tags, tags, 1, &tile->tag)) { in nv25_fb_tile_comp()
36 if (!(flags & 2)) tile->zcomp = 0x00100000; /* Z16 */ in nv25_fb_tile_comp()
37 else tile->zcomp = 0x00200000; /* Z24S8 */ in nv25_fb_tile_comp()
38 tile->zcomp |= tile->tag->offset; in nv25_fb_tile_comp()
40 tile->zcomp |= 0x01000000; in nv25_fb_tile_comp()
48 .tile.regions = 8,
49 .tile.init = nv20_fb_tile_init,
50 .tile
30 nv25_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv25_fb_tile_comp() argument
[all...]
H A Dnv40.c31 struct nvkm_fb_tile *tile) in nv40_fb_tile_comp()
36 !nvkm_mm_head(&fb->tags.mm, 0, 1, tags, tags, 1, &tile->tag)) { in nv40_fb_tile_comp()
37 tile->zcomp = 0x28000000; /* Z24S8_SPLIT_GRAD */ in nv40_fb_tile_comp()
38 tile->zcomp |= ((tile->tag->offset ) >> 8); in nv40_fb_tile_comp()
39 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 8) << 13; in nv40_fb_tile_comp()
41 tile->zcomp |= 0x40000000; in nv40_fb_tile_comp()
56 .tile.regions = 8,
57 .tile
30 nv40_fb_tile_comp(struct nvkm_fb *fb, int i, u32 size, u32 flags, struct nvkm_fb_tile *tile) nv40_fb_tile_comp() argument
[all...]
H A Dnv44.c31 u32 flags, struct nvkm_fb_tile *tile) in nv44_fb_tile_init()
33 tile->addr = 0x00000001; /* mode = vram */ in nv44_fb_tile_init()
34 tile->addr |= addr; in nv44_fb_tile_init()
35 tile->limit = max(1u, addr + size) - 1; in nv44_fb_tile_init()
36 tile->pitch = pitch; in nv44_fb_tile_init()
40 nv44_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv44_fb_tile_prog() argument
43 nvkm_wr32(device, 0x100604 + (i * 0x10), tile->limit); in nv44_fb_tile_prog()
44 nvkm_wr32(device, 0x100608 + (i * 0x10), tile->pitch); in nv44_fb_tile_prog()
45 nvkm_wr32(device, 0x100600 + (i * 0x10), tile->addr); in nv44_fb_tile_prog()
60 .tile
30 nv44_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) nv44_fb_tile_init() argument
[all...]
H A Dnv46.c31 u32 flags, struct nvkm_fb_tile *tile) in nv46_fb_tile_init()
34 if (!(flags & 4)) tile->addr = (0 << 3); in nv46_fb_tile_init()
35 else tile->addr = (1 << 3); in nv46_fb_tile_init()
37 tile->addr |= 0x00000001; /* mode = vram */ in nv46_fb_tile_init()
38 tile->addr |= addr; in nv46_fb_tile_init()
39 tile->limit = max(1u, addr + size) - 1; in nv46_fb_tile_init()
40 tile->pitch = pitch; in nv46_fb_tile_init()
46 .tile.regions = 15,
47 .tile.init = nv46_fb_tile_init,
48 .tile
30 nv46_fb_tile_init(struct nvkm_fb *fb, int i, u32 addr, u32 size, u32 pitch, u32 flags, struct nvkm_fb_tile *tile) nv46_fb_tile_init() argument
[all...]
H A Dnv41.c30 nv41_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv41_fb_tile_prog() argument
33 nvkm_wr32(device, 0x100604 + (i * 0x10), tile->limit); in nv41_fb_tile_prog()
34 nvkm_wr32(device, 0x100608 + (i * 0x10), tile->pitch); in nv41_fb_tile_prog()
35 nvkm_wr32(device, 0x100600 + (i * 0x10), tile->addr); in nv41_fb_tile_prog()
37 nvkm_wr32(device, 0x100700 + (i * 0x04), tile->zcomp); in nv41_fb_tile_prog()
50 .tile.regions = 12,
51 .tile.init = nv30_fb_tile_init,
52 .tile.comp = nv40_fb_tile_comp,
53 .tile.fini = nv20_fb_tile_fini,
54 .tile
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_mman.c19 struct tile { struct
33 static u64 tiled_offset(const struct tile *tile, u64 v) in tiled_offset() argument
37 if (tile->tiling == I915_TILING_NONE) in tiled_offset()
40 y = div64_u64_rem(v, tile->stride, &x); in tiled_offset()
41 v = div64_u64_rem(y, tile->height, &y) * tile->stride * tile->height; in tiled_offset()
43 if (tile->tiling == I915_TILING_X) { in tiled_offset()
44 v += y * tile in tiled_offset()
81 check_partial_mapping(struct drm_i915_gem_object *obj, const struct tile *tile, struct rnd_state *prng) check_partial_mapping() argument
171 check_partial_mappings(struct drm_i915_gem_object *obj, const struct tile *tile, unsigned long end_time) check_partial_mappings() argument
273 setup_tile_size(struct tile *tile, struct drm_i915_private *i915) setup_tile_size() argument
335 struct tile tile; igt_partial_tiling() local
353 struct tile tile; igt_partial_tiling() local
472 struct tile tile; igt_smoke_tiling() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv44.c31 nv44_gr_tile(struct nvkm_gr *base, int i, struct nvkm_fb_tile *tile) in nv44_gr_tile() argument
44 nvkm_wr32(device, NV20_PGRAPH_TSIZE(i), tile->pitch); in nv44_gr_tile()
45 nvkm_wr32(device, NV20_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
46 nvkm_wr32(device, NV20_PGRAPH_TILE(i), tile->addr); in nv44_gr_tile()
53 nvkm_wr32(device, NV47_PGRAPH_TSIZE(i), tile->pitch); in nv44_gr_tile()
54 nvkm_wr32(device, NV47_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
55 nvkm_wr32(device, NV47_PGRAPH_TILE(i), tile->addr); in nv44_gr_tile()
56 nvkm_wr32(device, NV40_PGRAPH_TSIZE1(i), tile->pitch); in nv44_gr_tile()
57 nvkm_wr32(device, NV40_PGRAPH_TLIMIT1(i), tile->limit); in nv44_gr_tile()
58 nvkm_wr32(device, NV40_PGRAPH_TILE1(i), tile in nv44_gr_tile()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv44.c31 nv44_gr_tile(struct nvkm_gr *base, int i, struct nvkm_fb_tile *tile) in nv44_gr_tile() argument
44 nvkm_wr32(device, NV20_PGRAPH_TSIZE(i), tile->pitch); in nv44_gr_tile()
45 nvkm_wr32(device, NV20_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
46 nvkm_wr32(device, NV20_PGRAPH_TILE(i), tile->addr); in nv44_gr_tile()
53 nvkm_wr32(device, NV47_PGRAPH_TSIZE(i), tile->pitch); in nv44_gr_tile()
54 nvkm_wr32(device, NV47_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
55 nvkm_wr32(device, NV47_PGRAPH_TILE(i), tile->addr); in nv44_gr_tile()
56 nvkm_wr32(device, NV40_PGRAPH_TSIZE1(i), tile->pitch); in nv44_gr_tile()
57 nvkm_wr32(device, NV40_PGRAPH_TLIMIT1(i), tile->limit); in nv44_gr_tile()
58 nvkm_wr32(device, NV40_PGRAPH_TILE1(i), tile in nv44_gr_tile()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_mman.c30 struct tile { struct
44 static u64 tiled_offset(const struct tile *tile, u64 v) in tiled_offset() argument
48 if (tile->tiling == I915_TILING_NONE) in tiled_offset()
51 y = div64_u64_rem(v, tile->stride, &x); in tiled_offset()
52 v = div64_u64_rem(y, tile->height, &y) * tile->stride * tile->height; in tiled_offset()
54 if (tile->tiling == I915_TILING_X) { in tiled_offset()
55 v += y * tile in tiled_offset()
92 check_partial_mapping(struct drm_i915_gem_object *obj, const struct tile *tile, struct rnd_state *prng) check_partial_mapping() argument
185 check_partial_mappings(struct drm_i915_gem_object *obj, const struct tile *tile, unsigned long end_time) check_partial_mappings() argument
290 setup_tile_size(struct tile *tile, struct drm_i915_private *i915) setup_tile_size() argument
352 struct tile tile; igt_partial_tiling() local
370 struct tile tile; igt_partial_tiling() local
489 struct tile tile; igt_smoke_tiling() local
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