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Searched refs:src_reloc (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Devergreen_cs.c2800 struct radeon_bo_list *src_reloc, *dst_reloc, *dst2_reloc; in evergreen_dma_cs_parse() local
2855 r = r600_dma_cs_next_reloc(p, &src_reloc); in evergreen_dma_cs_parse()
2873 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2875 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2884 ib[idx+2] += (u32)(src_reloc->gpu_offset & 0xfffffffc); in evergreen_dma_cs_parse()
2886 ib[idx+4] += upper_32_bits(src_reloc->gpu_offset) & 0xff; in evergreen_dma_cs_parse()
2896 ib[idx+1] += (u32)(src_reloc->gpu_offset >> 8); in evergreen_dma_cs_parse()
2906 ib[idx+7] += (u32)(src_reloc->gpu_offset & 0xfffffffc); in evergreen_dma_cs_parse()
2907 ib[idx+8] += upper_32_bits(src_reloc->gpu_offset) & 0xff; in evergreen_dma_cs_parse()
2913 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc in evergreen_dma_cs_parse()
[all...]
H A Dr600_cs.c2377 struct radeon_bo_list *src_reloc, *dst_reloc; in r600_dma_cs_parse() local
2424 r = r600_dma_cs_next_reloc(p, &src_reloc); in r600_dma_cs_parse()
2441 ib[idx+1] += (u32)(src_reloc->gpu_offset >> 8); in r600_dma_cs_parse()
2451 ib[idx+5] += (u32)(src_reloc->gpu_offset & 0xfffffffc); in r600_dma_cs_parse()
2452 ib[idx+6] += upper_32_bits(src_reloc->gpu_offset) & 0xff; in r600_dma_cs_parse()
2467 ib[idx+2] += (u32)(src_reloc->gpu_offset & 0xfffffffc); in r600_dma_cs_parse()
2469 ib[idx+4] += upper_32_bits(src_reloc->gpu_offset) & 0xff; in r600_dma_cs_parse()
2478 ib[idx+2] += (u32)(src_reloc->gpu_offset & 0xfffffffc); in r600_dma_cs_parse()
2479 ib[idx+3] += upper_32_bits(src_reloc->gpu_offset) & 0xff; in r600_dma_cs_parse()
2484 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc in r600_dma_cs_parse()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Devergreen_cs.c2799 struct radeon_bo_list *src_reloc, *dst_reloc, *dst2_reloc; in evergreen_dma_cs_parse() local
2854 r = r600_dma_cs_next_reloc(p, &src_reloc); in evergreen_dma_cs_parse()
2872 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) { in evergreen_dma_cs_parse()
2874 src_offset + (count * 4), radeon_bo_size(src_reloc->robj)); in evergreen_dma_cs_parse()
2883 ib[idx+2] += (u32)(src_reloc->gpu_offset & 0xfffffffc); in evergreen_dma_cs_parse()
2885 ib[idx+4] += upper_32_bits(src_reloc->gpu_offset) & 0xff; in evergreen_dma_cs_parse()
2895 ib[idx+1] += (u32)(src_reloc->gpu_offset >> 8); in evergreen_dma_cs_parse()
2905 ib[idx+7] += (u32)(src_reloc->gpu_offset & 0xfffffffc); in evergreen_dma_cs_parse()
2906 ib[idx+8] += upper_32_bits(src_reloc->gpu_offset) & 0xff; in evergreen_dma_cs_parse()
2912 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc in evergreen_dma_cs_parse()
[all...]
H A Dr600_cs.c2379 struct radeon_bo_list *src_reloc, *dst_reloc; in r600_dma_cs_parse() local
2426 r = r600_dma_cs_next_reloc(p, &src_reloc); in r600_dma_cs_parse()
2443 ib[idx+1] += (u32)(src_reloc->gpu_offset >> 8); in r600_dma_cs_parse()
2453 ib[idx+5] += (u32)(src_reloc->gpu_offset & 0xfffffffc); in r600_dma_cs_parse()
2454 ib[idx+6] += upper_32_bits(src_reloc->gpu_offset) & 0xff; in r600_dma_cs_parse()
2469 ib[idx+2] += (u32)(src_reloc->gpu_offset & 0xfffffffc); in r600_dma_cs_parse()
2471 ib[idx+4] += upper_32_bits(src_reloc->gpu_offset) & 0xff; in r600_dma_cs_parse()
2480 ib[idx+2] += (u32)(src_reloc->gpu_offset & 0xfffffffc); in r600_dma_cs_parse()
2481 ib[idx+3] += upper_32_bits(src_reloc->gpu_offset) & 0xff; in r600_dma_cs_parse()
2486 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc in r600_dma_cs_parse()
[all...]

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