| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/calcs/ |
| H A D | dcn_calc_auto.c | 45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
140 if ((v->source_surface_mode[k] == dcn_bw_sw_linear && v->source_scan[k] != dcn_bw_hor) || ((v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x || v->source_surface_mode[k] == dcn_bw_sw_var_d || v->source_surface_mode[k] == dcn_bw_sw_var_d_x) && v->source_pixel_format[k] != dcn_bw_rgb_sub_64)) { in mode_support_and_system_configuration()
147 if (v->source_scan[k] == dcn_bw_hor) { in mode_support_and_system_configuration()
180 if (v->pte_enable == dcn_bw_yes && v->source_scan[k] != dcn_bw_hor && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x)) { in mode_support_and_system_configuration()
183 else if (v->pte_enable == dcn_bw_yes && v->source_scan[k] == dcn_bw_hor && (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 || v->source_pixel_format[k] == dcn_bw_rgb_sub_32) && (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x)) { in mode_support_and_system_configuration()
374 if (v->source_scan[k] == dcn_bw_hor) { in mode_support_and_system_configuration()
383 if (v->source_surface_mode[k] == dcn_bw_sw_linear || (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_var_s || v->source_surface_mode[k] == dcn_bw_sw_var_s_x) && v->source_scan[k] == dcn_bw_hor)) { in mode_support_and_system_configuration()
396 else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8 && v->source_scan[k] == dcn_bw_hor) { in mode_support_and_system_configuration()
405 else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_10 && v->source_scan[ in mode_support_and_system_configuration()
[all...] |
| H A D | dcn_calcs.c | 337 input->src.source_scan = dm_horz; in pipe_ctx_to_e2e_pipe_params()
352 input->src.source_scan = dm_horz; in pipe_ctx_to_e2e_pipe_params()
356 input->src.source_scan = dm_vert; in pipe_ctx_to_e2e_pipe_params()
954 v->source_scan[input_idx] = dcn_bw_hor; in dcn_validate_bandwidth()
1040 v->source_scan[input_idx] = (pipe->plane_state->rotation % 2) ? dcn_bw_vert : dcn_bw_hor; in dcn_validate_bandwidth()
1101 if (v->source_scan[k] == dcn_bw_hor) in dcn_validate_bandwidth()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calc_auto.c | 45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
140 if ((v->source_surface_mode[k] == dcn_bw_sw_linear && v->source_scan[k] != dcn_bw_hor) || ((v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x || v->source_surface_mode[k] == dcn_bw_sw_var_d || v->source_surface_mode[k] == dcn_bw_sw_var_d_x) && v->source_pixel_format[k] != dcn_bw_rgb_sub_64)) { in mode_support_and_system_configuration()
147 if (v->source_scan[k] == dcn_bw_hor) { in mode_support_and_system_configuration()
180 if (v->pte_enable == dcn_bw_yes && v->source_scan[k] != dcn_bw_hor && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d || v->source_surface_mode[k] == dcn_bw_sw_4_kb_d_x)) { in mode_support_and_system_configuration()
183 else if (v->pte_enable == dcn_bw_yes && v->source_scan[k] == dcn_bw_hor && (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 || v->source_pixel_format[k] == dcn_bw_rgb_sub_32) && (v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_d_x)) { in mode_support_and_system_configuration()
374 if (v->source_scan[k] == dcn_bw_hor) { in mode_support_and_system_configuration()
383 if (v->source_surface_mode[k] == dcn_bw_sw_linear || (v->source_pixel_format[k] == dcn_bw_rgb_sub_64 && (v->source_surface_mode[k] == dcn_bw_sw_4_kb_s || v->source_surface_mode[k] == dcn_bw_sw_4_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_t || v->source_surface_mode[k] == dcn_bw_sw_64_kb_s_x || v->source_surface_mode[k] == dcn_bw_sw_var_s || v->source_surface_mode[k] == dcn_bw_sw_var_s_x) && v->source_scan[k] == dcn_bw_hor)) { in mode_support_and_system_configuration()
396 else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_8 && v->source_scan[k] == dcn_bw_hor) { in mode_support_and_system_configuration()
405 else if (v->source_pixel_format[k] == dcn_bw_yuv420_sub_10 && v->source_scan[ in mode_support_and_system_configuration()
[all...] |
| H A D | dcn_calcs.c | 338 input->src.source_scan = dm_horz; in pipe_ctx_to_e2e_pipe_params()
353 input->src.source_scan = dm_horz; in pipe_ctx_to_e2e_pipe_params()
357 input->src.source_scan = dm_vert; in pipe_ctx_to_e2e_pipe_params()
939 v->source_scan[input_idx] = dcn_bw_hor; in dcn_validate_bandwidth()
1025 v->source_scan[input_idx] = (pipe->plane_state->rotation % 2) ? dcn_bw_vert : dcn_bw_hor; in dcn_validate_bandwidth()
1086 if (v->source_scan[k] == dcn_bw_hor) in dcn_validate_bandwidth()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_rq_dlg_calc_21.c | 228 bool surf_vert = (pipe_src_param.source_scan == dm_vert); in handle_det_buf_split()
332 unsigned int source_scan, in get_meta_and_pte_attr()
337 bool surf_vert = (source_scan == dm_vert); in get_meta_and_pte_attr()
725 access_dir = (pipe_param.src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in get_surf_rq_param()
774 pipe_param.src.source_scan, in get_surf_rq_param()
1027 access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in dml_rq_dlg_get_dlg_params()
320 get_meta_and_pte_attr( struct display_mode_lib *mode_lib, display_data_rq_dlg_params_st *rq_dlg_param, display_data_rq_misc_params_st *rq_misc_param, display_data_rq_sizing_params_st *rq_sizing_param, unsigned int vp_width, unsigned int vp_height, unsigned int data_pitch, unsigned int meta_pitch, unsigned int source_format, unsigned int tiling, unsigned int macro_tile_size, unsigned int source_scan, unsigned int hostvm_enable, unsigned int is_chroma) get_meta_and_pte_attr() argument
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_rq_dlg_calc_21.c | 228 bool surf_vert = (pipe_src_param->source_scan == dm_vert); in handle_det_buf_split()
332 unsigned int source_scan, in get_meta_and_pte_attr()
337 bool surf_vert = (source_scan == dm_vert); in get_meta_and_pte_attr()
725 access_dir = (pipe_param->src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in get_surf_rq_param()
774 pipe_param->src.source_scan, in get_surf_rq_param()
1027 access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in dml_rq_dlg_get_dlg_params()
320 get_meta_and_pte_attr( struct display_mode_lib *mode_lib, display_data_rq_dlg_params_st *rq_dlg_param, display_data_rq_misc_params_st *rq_misc_param, display_data_rq_sizing_params_st *rq_sizing_param, unsigned int vp_width, unsigned int vp_height, unsigned int data_pitch, unsigned int meta_pitch, unsigned int source_format, unsigned int tiling, unsigned int macro_tile_size, unsigned int source_scan, unsigned int hostvm_enable, unsigned int is_chroma) get_meta_and_pte_attr() argument
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_rq_dlg_calc_20v2.c | 246 bool surf_vert = (pipe_src_param.source_scan == dm_vert); in handle_det_buf_split()
345 unsigned int source_scan, in get_meta_and_pte_attr()
349 bool surf_vert = (source_scan == dm_vert); in get_meta_and_pte_attr()
734 pipe_src_param.source_scan, in get_surf_rq_param()
976 access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in dml20v2_rq_dlg_get_dlg_params()
334 get_meta_and_pte_attr(struct display_mode_lib *mode_lib, display_data_rq_dlg_params_st *rq_dlg_param, display_data_rq_misc_params_st *rq_misc_param, display_data_rq_sizing_params_st *rq_sizing_param, unsigned int vp_width, unsigned int vp_height, unsigned int data_pitch, unsigned int meta_pitch, unsigned int source_format, unsigned int tiling, unsigned int macro_tile_size, unsigned int source_scan, unsigned int is_chroma) get_meta_and_pte_attr() argument
|
| H A D | display_rq_dlg_calc_20.c | 246 bool surf_vert = (pipe_src_param.source_scan == dm_vert); in handle_det_buf_split()
345 unsigned int source_scan, in get_meta_and_pte_attr()
349 bool surf_vert = (source_scan == dm_vert); in get_meta_and_pte_attr()
734 pipe_src_param.source_scan, in get_surf_rq_param()
975 access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in dml20_rq_dlg_get_dlg_params()
334 get_meta_and_pte_attr(struct display_mode_lib *mode_lib, display_data_rq_dlg_params_st *rq_dlg_param, display_data_rq_misc_params_st *rq_misc_param, display_data_rq_sizing_params_st *rq_sizing_param, unsigned int vp_width, unsigned int vp_height, unsigned int data_pitch, unsigned int meta_pitch, unsigned int source_format, unsigned int tiling, unsigned int macro_tile_size, unsigned int source_scan, unsigned int is_chroma) get_meta_and_pte_attr() argument
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_rq_dlg_calc_20v2.c | 246 bool surf_vert = (pipe_src_param->source_scan == dm_vert); in handle_det_buf_split()
345 unsigned int source_scan, in get_meta_and_pte_attr()
349 bool surf_vert = (source_scan == dm_vert); in get_meta_and_pte_attr()
734 pipe_src_param->source_scan, in get_surf_rq_param()
976 access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in dml20v2_rq_dlg_get_dlg_params()
334 get_meta_and_pte_attr(struct display_mode_lib *mode_lib, display_data_rq_dlg_params_st *rq_dlg_param, display_data_rq_misc_params_st *rq_misc_param, display_data_rq_sizing_params_st *rq_sizing_param, unsigned int vp_width, unsigned int vp_height, unsigned int data_pitch, unsigned int meta_pitch, unsigned int source_format, unsigned int tiling, unsigned int macro_tile_size, unsigned int source_scan, unsigned int is_chroma) get_meta_and_pte_attr() argument
|
| H A D | display_rq_dlg_calc_20.c | 246 bool surf_vert = (pipe_src_param->source_scan == dm_vert); in handle_det_buf_split()
345 unsigned int source_scan, in get_meta_and_pte_attr()
349 bool surf_vert = (source_scan == dm_vert); in get_meta_and_pte_attr()
734 pipe_src_param->source_scan, in get_surf_rq_param()
975 access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in dml20_rq_dlg_get_dlg_params()
334 get_meta_and_pte_attr(struct display_mode_lib *mode_lib, display_data_rq_dlg_params_st *rq_dlg_param, display_data_rq_misc_params_st *rq_misc_param, display_data_rq_sizing_params_st *rq_sizing_param, unsigned int vp_width, unsigned int vp_height, unsigned int data_pitch, unsigned int meta_pitch, unsigned int source_format, unsigned int tiling, unsigned int macro_tile_size, unsigned int source_scan, unsigned int is_chroma) get_meta_and_pte_attr() argument
|
| H A D | dcn20_fpu.c | 1543 pipes[pipe_cnt].pipe.src.source_scan = dm_horz; in dcn20_populate_dml_pipes_from_context()
1595 pipes[pipe_cnt].pipe.src.source_scan = pln->rotation == ROTATION_ANGLE_90 in dcn20_populate_dml_pipes_from_context()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_rq_dlg_calc_30.c | 171 bool surf_vert = (pipe_src_param.source_scan == dm_vert); in handle_det_buf_split()
379 unsigned int source_scan, in get_meta_and_pte_attr()
385 bool surf_vert = (source_scan == dm_vert); in get_meta_and_pte_attr()
782 access_dir = (pipe_param.src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in get_surf_rq_param()
834 pipe_param.src.source_scan, in get_surf_rq_param()
1178 access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in dml_rq_dlg_get_dlg_params()
368 get_meta_and_pte_attr(struct display_mode_lib *mode_lib, display_data_rq_dlg_params_st *rq_dlg_param, display_data_rq_misc_params_st *rq_misc_param, display_data_rq_sizing_params_st *rq_sizing_param, unsigned int vp_width, unsigned int vp_height, unsigned int data_pitch, unsigned int meta_pitch, unsigned int source_format, unsigned int tiling, unsigned int macro_tile_size, unsigned int source_scan, unsigned int hostvm_enable, unsigned int is_chroma, unsigned int surface_height) get_meta_and_pte_attr() argument
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | dml1_display_rq_dlg_calc.c | 285 bool surf_vert = (pipe_src_param.source_scan == dm_vert); in handle_det_buf_split()
391 int source_scan, in dml1_rq_dlg_get_row_heights()
395 bool surf_vert = (source_scan == dm_vert); in dml1_rq_dlg_get_row_heights()
649 surf_vert = (pipe_src_param.source_scan == dm_vert); in get_surf_rq_param()
936 pipe_src_param.source_scan, in get_surf_rq_param()
1204 access_dir = (e2e_pipe_param.pipe.src.source_scan == dm_vert); /* vp access direction: horizontal or vertical accessed */ in dml1_rq_dlg_get_dlg_params()
382 dml1_rq_dlg_get_row_heights( struct display_mode_lib *mode_lib, unsigned int *o_dpte_row_height, unsigned int *o_meta_row_height, unsigned int vp_width, unsigned int data_pitch, int source_format, int tiling, int macro_tile_size, int source_scan, int is_chroma) dml1_rq_dlg_get_row_heights() argument
|
| H A D | display_mode_structs.h | 245 int source_scan; member
|
| H A D | display_mode_lib.c | 159 dml_print("DML PARAMS: source_scan = %d\n", pipe_src->source_scan); in dml_log_pipe_params()
|
| H A D | display_mode_vba.c | 397 (enum scan_direction_class) (src->source_scan); in fetch_pipe_params()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_rq_dlg_calc_31.c | 177 bool surf_vert = (pipe_src_param->source_scan == dm_vert); in handle_det_buf_split()
311 unsigned int source_scan, in get_meta_and_pte_attr()
317 bool surf_vert = (source_scan == dm_vert); in get_meta_and_pte_attr()
687 access_dir = (pipe_param->src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in get_surf_rq_param()
741 pipe_param->src.source_scan, in get_surf_rq_param()
1008 access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in dml_rq_dlg_get_dlg_params()
299 get_meta_and_pte_attr( struct display_mode_lib *mode_lib, display_data_rq_dlg_params_st *rq_dlg_param, display_data_rq_misc_params_st *rq_misc_param, display_data_rq_sizing_params_st *rq_sizing_param, unsigned int vp_width, unsigned int vp_height, unsigned int data_pitch, unsigned int meta_pitch, unsigned int source_format, unsigned int tiling, unsigned int macro_tile_size, unsigned int source_scan, unsigned int hostvm_enable, unsigned int is_chroma, unsigned int surface_height) get_meta_and_pte_attr() argument
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_rq_dlg_calc_30.c | 170 bool surf_vert = (pipe_src_param->source_scan == dm_vert); in handle_det_buf_split()
288 unsigned int source_scan, in get_meta_and_pte_attr()
294 bool surf_vert = (source_scan == dm_vert); in get_meta_and_pte_attr()
691 access_dir = (pipe_param->src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in get_surf_rq_param()
743 pipe_param->src.source_scan, in get_surf_rq_param()
1087 access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in dml_rq_dlg_get_dlg_params()
277 get_meta_and_pte_attr(struct display_mode_lib *mode_lib, display_data_rq_dlg_params_st *rq_dlg_param, display_data_rq_misc_params_st *rq_misc_param, display_data_rq_sizing_params_st *rq_sizing_param, unsigned int vp_width, unsigned int vp_height, unsigned int data_pitch, unsigned int meta_pitch, unsigned int source_format, unsigned int tiling, unsigned int macro_tile_size, unsigned int source_scan, unsigned int hostvm_enable, unsigned int is_chroma, unsigned int surface_height) get_meta_and_pte_attr() argument
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_rq_dlg_calc_314.c | 265 bool surf_vert = (pipe_src_param->source_scan == dm_vert); in handle_det_buf_split()
399 unsigned int source_scan, in get_meta_and_pte_attr()
405 bool surf_vert = (source_scan == dm_vert); in get_meta_and_pte_attr()
775 access_dir = (pipe_param->src.source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in get_surf_rq_param()
828 pipe_param->src.source_scan, in get_surf_rq_param()
1095 access_dir = (src->source_scan == dm_vert); // vp access direction: horizontal or vertical accessed in dml_rq_dlg_get_dlg_params()
387 get_meta_and_pte_attr( struct display_mode_lib *mode_lib, display_data_rq_dlg_params_st *rq_dlg_param, display_data_rq_misc_params_st *rq_misc_param, display_data_rq_sizing_params_st *rq_sizing_param, unsigned int vp_width, unsigned int vp_height, unsigned int data_pitch, unsigned int meta_pitch, unsigned int source_format, unsigned int tiling, unsigned int macro_tile_size, unsigned int source_scan, unsigned int hostvm_enable, unsigned int is_chroma, unsigned int surface_height) get_meta_and_pte_attr() argument
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | dml1_display_rq_dlg_calc.c | 285 bool surf_vert = (pipe_src_param->source_scan == dm_vert); in handle_det_buf_split()
391 int source_scan, in dml1_rq_dlg_get_row_heights()
395 bool surf_vert = (source_scan == dm_vert); in dml1_rq_dlg_get_row_heights()
649 surf_vert = (pipe_src_param->source_scan == dm_vert); in get_surf_rq_param()
936 pipe_src_param->source_scan, in get_surf_rq_param()
1204 access_dir = (e2e_pipe_param->pipe.src.source_scan == dm_vert); /* vp access direction: horizontal or vertical accessed */ in dml1_rq_dlg_get_dlg_params()
382 dml1_rq_dlg_get_row_heights( struct display_mode_lib *mode_lib, unsigned int *o_dpte_row_height, unsigned int *o_meta_row_height, unsigned int vp_width, unsigned int data_pitch, int source_format, int tiling, int macro_tile_size, int source_scan, int is_chroma) dml1_rq_dlg_get_row_heights() argument
|
| H A D | display_mode_lib.c | 192 dml_print("DML PARAMS: source_scan = %d\n", pipe_src->source_scan); in dml_log_pipe_params()
|
| H A D | display_mode_structs.h | 398 int source_scan; member
|
| H A D | display_mode_vba.c | 548 (enum scan_direction_class) (src->source_scan); in fetch_pipe_params()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | dcn_calcs.h | 184 enum dcn_bw_defs source_scan[number_of_planes_minus_one + 1]; member
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | dcn_calcs.h | 184 enum dcn_bw_defs source_scan[number_of_planes_minus_one + 1]; member
|