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Help
Searched
refs:soc_readl
(Results
1 - 6
of
6
) sorted by relevance
/kernel/linux/linux-5.10/arch/c6x/platforms/
H
A
D
timer64.c
66
((
soc_readl
(&timer->emumgt) & (0xf << 16)) >> 16)
79
u32 tcr =
soc_readl
(&timer->tcr) & ~TCR_ENAMODELO_MASK;
in timer64_config()
96
soc_writel(
soc_readl
(&timer->tcr) & ~TCR_ENAMODELO_MASK, &timer->tcr);
in timer64_enable()
100
val =
soc_readl
(&timer->tcr);
in timer64_enable()
104
val =
soc_readl
(&timer->tgcr) & ~TGCR_TIMMODE_MASK;
in timer64_enable()
112
soc_writel(
soc_readl
(&timer->tcr) & ~TCR_ENAMODELO_MASK, &timer->tcr);
in timer64_disable()
H
A
D
megamod-pic.c
72
soc_writel(
soc_readl
(evtmask) | (1 << (src & 31)), evtmask);
in mask_megamod()
83
soc_writel(
soc_readl
(evtmask) & ~(1 << (src & 31)), evtmask);
in unmask_megamod()
106
while ((events =
soc_readl
(&pic->regs->mevtflag[idx])) != 0) {
in megamod_irq_cascade()
156
val =
soc_readl
(&pic->regs->intmux[index]);
in set_megamod_mux()
314
mask =
soc_readl
(&mm_pic->regs->mexpflag[i]);
in get_exception()
H
A
D
dscr.c
227
val =
soc_readl
(dscr.base + ctl->reg);
in dscr_set_devstate()
246
val =
soc_readl
(dscr.base + stat->reg);
in dscr_set_devstate()
271
val =
soc_readl
(dscr.base + r->reg);
in dscr_rmii_reset()
289
c6x_devstat =
soc_readl
(base + val);
in dscr_parse_devstat()
301
c6x_silicon_rev =
soc_readl
(base + vals[0]);
in dscr_parse_silicon_rev()
336
fuse =
soc_readl
(base + vals[f * 5]);
in dscr_parse_mac_fuse()
H
A
D
cache.c
109
#define imcr_get(reg)
soc_readl
(cache_base + (reg))
113
soc_readl
(cache_base + (reg)); \
H
A
D
pll.c
202
return
soc_readl
(pll->base + reg);
in pll_read()
/kernel/linux/linux-5.10/arch/c6x/include/asm/
H
A
D
soc.h
32
#define
soc_readl
(addr) __raw_readl(addr)
macro
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