| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_helper.c | 335 uint8_t shift2, uint32_t mask2, uint32_t *field_value2) in generic_reg_get2()
339 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get2()
345 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get3()
350 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get3()
357 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get4()
363 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get4()
371 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get5()
378 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get5()
387 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get6()
395 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get6()
333 generic_reg_get2(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2) generic_reg_get2() argument
343 generic_reg_get3(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3) generic_reg_get3() argument
355 generic_reg_get4(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4) generic_reg_get4() argument
369 generic_reg_get5(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5) generic_reg_get5() argument
385 generic_reg_get6(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6) generic_reg_get6() argument
403 generic_reg_get7(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7) generic_reg_get7() argument
423 generic_reg_get8(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7, uint8_t shift8, uint32_t mask8, uint32_t *field_value8) generic_reg_get8() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_helper.c | 290 uint8_t shift2, uint32_t mask2, uint32_t *field_value2) in generic_reg_get2()
294 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get2()
300 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get3()
305 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get3()
312 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get4()
318 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get4()
326 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get5()
333 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get5()
342 uint8_t shift2, uint32_t mask2, uint32_t *field_value2, in generic_reg_get6()
350 *field_value2 = get_reg_field_value_ex(reg_val, mask2, shift2); in generic_reg_get6()
288 generic_reg_get2(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2) generic_reg_get2() argument
298 generic_reg_get3(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3) generic_reg_get3() argument
310 generic_reg_get4(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4) generic_reg_get4() argument
324 generic_reg_get5(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5) generic_reg_get5() argument
340 generic_reg_get6(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6) generic_reg_get6() argument
358 generic_reg_get7(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7) generic_reg_get7() argument
378 generic_reg_get8(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7, uint8_t shift8, uint32_t mask8, uint32_t *field_value8) generic_reg_get8() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/clk/x86/ |
| H A D | clk-cgu.c | 403 ddiv->shift2, ddiv->width2); in lgm_clk_ddiv_recalc_rate()
470 if (lgm_get_clk_val(ddiv->membase, ddiv->reg, ddiv->shift2, 1)) { in lgm_clk_ddiv_set_rate()
501 if (lgm_get_clk_val(ddiv->membase, ddiv->reg, ddiv->shift2, 1)) { in lgm_clk_ddiv_round_rate()
518 if (lgm_get_clk_val(ddiv->membase, ddiv->reg, ddiv->shift2, 1)) { in lgm_clk_ddiv_round_rate()
565 ddiv->shift2 = list->ex_shift; in lgm_clk_register_ddiv()
|
| H A D | clk-cgu.h | 43 u8 shift2; member
|
| /kernel/linux/linux-6.6/drivers/clk/x86/ |
| H A D | clk-cgu.c | 403 ddiv->shift2, ddiv->width2); in lgm_clk_ddiv_recalc_rate()
470 if (lgm_get_clk_val(ddiv->membase, ddiv->reg, ddiv->shift2, 1)) { in lgm_clk_ddiv_set_rate()
501 if (lgm_get_clk_val(ddiv->membase, ddiv->reg, ddiv->shift2, 1)) { in lgm_clk_ddiv_round_rate()
518 if (lgm_get_clk_val(ddiv->membase, ddiv->reg, ddiv->shift2, 1)) { in lgm_clk_ddiv_round_rate()
565 ddiv->shift2 = list->ex_shift; in lgm_clk_register_ddiv()
|
| H A D | clk-cgu.h | 43 u8 shift2; member
|
| /kernel/linux/linux-5.10/arch/hexagon/lib/ |
| H A D | memcpy.S | 167 #define shift2 R5 /* in epilog to workshifter to extract bytes */ define
444 shift2 = asl(epilog, #3); define
447 shiftb = and(shift2, #32);
478 shiftb = and(shift2, #16);
|
| /kernel/linux/linux-6.6/arch/hexagon/lib/ |
| H A D | memcpy.S | 167 #define shift2 R5 /* in epilog to workshifter to extract bytes */ define
444 shift2 = asl(epilog, #3); define
447 shiftb = and(shift2, #32);
478 shiftb = and(shift2, #16);
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | reg_helper.h | 396 uint8_t shift2, uint32_t mask2, uint32_t *field_value2);
400 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
405 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
411 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
418 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
426 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
435 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | reg_helper.h | 396 uint8_t shift2, uint32_t mask2, uint32_t *field_value2);
400 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
405 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
411 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
418 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
426 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
435 uint8_t shift2, uint32_t mask2, uint32_t *field_value2,
|
| /kernel/linux/linux-5.10/drivers/clk/mvebu/ |
| H A D | armada-37xx-periph.c | 76 u8 shift2; member
153 .shift2 = _shift2, \
344 div *= get_div(double_div->reg2, double_div->shift2); in clk_double_div_recalc_rate()
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| /kernel/linux/linux-6.6/drivers/clk/mvebu/ |
| H A D | armada-37xx-periph.c | 76 u8 shift2; member
153 .shift2 = _shift2, \
344 div *= get_div(double_div->reg2, double_div->shift2); in clk_double_div_recalc_rate()
|