| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_helper.c | 110 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in set_reg_field_values()
118 field_value1, mask1, shift1); in set_reg_field_values()
225 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in generic_reg_update_ex()
234 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in generic_reg_update_ex()
253 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in generic_reg_set_ex()
261 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in generic_reg_set_ex()
289 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get2()
293 *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); in generic_reg_get2()
299 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get3()
304 *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); in generic_reg_get3()
108 set_reg_field_values(struct dc_reg_value_masks *field_value_mask, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, va_list ap) set_reg_field_values() argument
223 generic_reg_update_ex(const struct dc_context *ctx, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_reg_update_ex() argument
251 generic_reg_set_ex(const struct dc_context *ctx, uint32_t addr, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_reg_set_ex() argument
288 generic_reg_get2(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2) generic_reg_get2() argument
298 generic_reg_get3(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3) generic_reg_get3() argument
310 generic_reg_get4(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4) generic_reg_get4() argument
324 generic_reg_get5(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5) generic_reg_get5() argument
340 generic_reg_get6(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6) generic_reg_get6() argument
358 generic_reg_get7(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7) generic_reg_get7() argument
378 generic_reg_get8(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7, uint8_t shift8, uint32_t mask8, uint32_t *field_value8) generic_reg_get8() argument
508 generic_indirect_reg_get(const struct dc_context *ctx, uint32_t addr_index, uint32_t addr_data, uint32_t index, int n, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, ...) generic_indirect_reg_get() argument
539 generic_indirect_reg_update_ex(const struct dc_context *ctx, uint32_t addr_index, uint32_t addr_data, uint32_t index, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_indirect_reg_update_ex() argument
570 generic_indirect_reg_update_ex_sync(const struct dc_context *ctx, uint32_t index, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_indirect_reg_update_ex_sync() argument
599 generic_indirect_reg_get_sync(const struct dc_context *ctx, uint32_t index, int n, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, ...) generic_indirect_reg_get_sync() argument
[all...] |
| H A D | dm_services.h | 121 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
125 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dmub/src/ |
| H A D | dmub_reg.c | 44 uint32_t addr, int n, uint8_t shift1, in set_reg_field_values()
53 shift1); in set_reg_field_values()
72 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, in dmub_reg_update() argument
80 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in dmub_reg_update()
90 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) in dmub_reg_set()
96 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in dmub_reg_set()
43 set_reg_field_values(struct dmub_reg_value_masks *field_value_mask, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, va_list ap) set_reg_field_values() argument
89 dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) dmub_reg_set() argument
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| H A D | dmub_reg.h | 116 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
118 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dmub/src/ |
| H A D | dmub_reg.c | 44 uint32_t addr, int n, uint8_t shift1, in set_reg_field_values()
53 shift1); in set_reg_field_values()
72 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, in dmub_reg_update() argument
80 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in dmub_reg_update()
90 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) in dmub_reg_set()
96 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in dmub_reg_set()
43 set_reg_field_values(struct dmub_reg_value_masks *field_value_mask, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, va_list ap) set_reg_field_values() argument
89 dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) dmub_reg_set() argument
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| H A D | dmub_reg.h | 116 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
118 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_helper.c | 127 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in set_reg_field_values()
135 field_value1, mask1, shift1); in set_reg_field_values()
244 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in generic_reg_update_ex()
253 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in generic_reg_update_ex()
272 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in generic_reg_set_ex()
280 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1, in generic_reg_set_ex()
334 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get2()
338 *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); in generic_reg_get2()
344 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get3()
349 *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); in generic_reg_get3()
125 set_reg_field_values(struct dc_reg_value_masks *field_value_mask, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, va_list ap) set_reg_field_values() argument
242 generic_reg_update_ex(const struct dc_context *ctx, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_reg_update_ex() argument
270 generic_reg_set_ex(const struct dc_context *ctx, uint32_t addr, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_reg_set_ex() argument
333 generic_reg_get2(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2) generic_reg_get2() argument
343 generic_reg_get3(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3) generic_reg_get3() argument
355 generic_reg_get4(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4) generic_reg_get4() argument
369 generic_reg_get5(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5) generic_reg_get5() argument
385 generic_reg_get6(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6) generic_reg_get6() argument
403 generic_reg_get7(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7) generic_reg_get7() argument
423 generic_reg_get8(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7, uint8_t shift8, uint32_t mask8, uint32_t *field_value8) generic_reg_get8() argument
555 generic_indirect_reg_get(const struct dc_context *ctx, uint32_t addr_index, uint32_t addr_data, uint32_t index, int n, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, ...) generic_indirect_reg_get() argument
586 generic_indirect_reg_update_ex(const struct dc_context *ctx, uint32_t addr_index, uint32_t addr_data, uint32_t index, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_indirect_reg_update_ex() argument
[all...] |
| H A D | dm_services.h | 139 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
143 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | reg_helper.h | 395 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
399 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
404 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
410 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
417 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
425 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
434 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
492 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
498 uint8_t shift1, uint32_t mask1, uint32_t field_value1,
527 uint8_t shift1, uint32_
[all...] |
| /kernel/linux/linux-5.10/drivers/clk/x86/ |
| H A D | clk-cgu.h | 41 u8 shift1; member
138 u8 shift1; member
160 .shift1 = _shft1, \
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| H A D | clk-cgu.c | 401 ddiv->shift1, ddiv->width1) + 1; in lgm_clk_ddiv_recalc_rate()
484 lgm_set_clk_val(ddiv->membase, ddiv->reg, ddiv->shift1, ddiv->width1, in lgm_clk_ddiv_set_rate()
561 ddiv->shift1 = list->shift1; in lgm_clk_register_ddiv()
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| /kernel/linux/linux-6.6/drivers/clk/x86/ |
| H A D | clk-cgu.h | 41 u8 shift1; member
138 u8 shift1; member
160 .shift1 = _shft1, \
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| H A D | clk-cgu.c | 401 ddiv->shift1, ddiv->width1) + 1; in lgm_clk_ddiv_recalc_rate()
484 lgm_set_clk_val(ddiv->membase, ddiv->reg, ddiv->shift1, ddiv->width1, in lgm_clk_ddiv_set_rate()
561 ddiv->shift1 = list->shift1; in lgm_clk_register_ddiv()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | reg_helper.h | 395 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
399 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
404 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
410 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
417 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
425 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
434 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
492 uint8_t shift1, uint32_t mask1, uint32_t *field_value1,
498 uint8_t shift1, uint32_t mask1, uint32_t field_value1,
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| /kernel/linux/linux-5.10/drivers/clk/mvebu/ |
| H A D | armada-37xx-periph.c | 74 u8 shift1; member
152 .shift1 = _shift1, \
343 div = get_div(double_div->reg1, double_div->shift1); in clk_double_div_recalc_rate()
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| /kernel/linux/linux-6.6/drivers/clk/mvebu/ |
| H A D | armada-37xx-periph.c | 74 u8 shift1; member
152 .shift1 = _shift1, \
343 div = get_div(double_div->reg1, double_div->shift1); in clk_double_div_recalc_rate()
|