| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_stream_encoder.c | 39 enc110->se_shift->field_name, enc110->se_mask->field_name
321 if (enc110->se_mask->DP_VID_M_DOUBLE_VALUE_EN) in dce110_stream_encoder_dp_set_stream_attribute()
324 if (enc110->se_mask->DP_VID_N_MUL) in dce110_stream_encoder_dp_set_stream_attribute()
438 if (enc110->se_mask->DP_DYN_RANGE && enc110->se_mask->DP_YCBCR_RANGE) in dce110_stream_encoder_dp_set_stream_attribute()
557 if (!enc110->se_mask->HDMI_DATA_SCRAMBLE_EN) { in dce110_stream_encoder_hdmi_set_stream_attribute()
606 if (enc110->se_mask->HDMI_DATA_SCRAMBLE_EN) { in dce110_stream_encoder_hdmi_set_stream_attribute()
731 if (enc110->se_mask->HDMI_AVI_INFO_CONT && in dce110_stream_encoder_update_hdmi_info_packets()
732 enc110->se_mask->HDMI_AVI_INFO_SEND) { in dce110_stream_encoder_update_hdmi_info_packets()
766 if (enc110->se_mask in dce110_stream_encoder_update_hdmi_info_packets()
1553 dce110_stream_encoder_construct( struct dce110_stream_encoder *enc110, struct dc_context *ctx, struct dc_bios *bp, enum engine_id eng_id, const struct dce110_stream_enc_registers *regs, const struct dce_stream_encoder_shift *se_shift, const struct dce_stream_encoder_mask *se_mask) dce110_stream_encoder_construct() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_mqd_manager_v9.c | 49 uint32_t se_mask[KFD_MAX_NUM_SE] = {0}; in update_cu_mask() local
55 q->cu_mask, q->cu_mask_count, se_mask); in update_cu_mask()
58 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
59 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
60 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
61 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
62 m->compute_static_thread_mgmt_se4 = se_mask[4]; in update_cu_mask()
63 m->compute_static_thread_mgmt_se5 = se_mask[5]; in update_cu_mask()
64 m->compute_static_thread_mgmt_se6 = se_mask[6]; in update_cu_mask()
65 m->compute_static_thread_mgmt_se7 = se_mask[ in update_cu_mask()
[all...] |
| H A D | kfd_mqd_manager.c | 98 uint32_t *se_mask) in mqd_symmetrically_map_cu_mask()
125 * 16 bits of se_mask) and will take care of the actual distribution of in mqd_symmetrically_map_cu_mask()
127 * Each half of se_mask must be filled only on bits 0-cu_per_sh[se][sh]-1. in mqd_symmetrically_map_cu_mask()
136 * se_mask programs up to 2 SH in the upper and lower 16 bits. in mqd_symmetrically_map_cu_mask()
140 * cu_mask[0] bit0 -> se_mask[0] bit0 in mqd_symmetrically_map_cu_mask()
141 * cu_mask[0] bit1 -> se_mask[1] bit0 in mqd_symmetrically_map_cu_mask()
143 * cu_mask[0] bit4 -> se_mask[0] bit1 in mqd_symmetrically_map_cu_mask()
147 * cu_mask[0] bit0 -> se_mask[0] bit0 (SE0,SH0,CU0) in mqd_symmetrically_map_cu_mask()
148 * cu_mask[0] bit1 -> se_mask[1] bit0 (SE1,SH0,CU0) in mqd_symmetrically_map_cu_mask()
150 * cu_mask[0] bit4 -> se_mask[ in mqd_symmetrically_map_cu_mask()
96 mqd_symmetrically_map_cu_mask(struct mqd_manager *mm, const uint32_t *cu_mask, uint32_t cu_mask_count, uint32_t *se_mask) mqd_symmetrically_map_cu_mask() argument
[all...] |
| H A D | kfd_mqd_manager_vi.c | 51 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask() local
57 q->cu_mask, q->cu_mask_count, se_mask); in update_cu_mask()
60 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
61 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
62 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
63 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
|
| H A D | kfd_mqd_manager_v10.c | 48 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask() local
54 q->cu_mask, q->cu_mask_count, se_mask); in update_cu_mask()
57 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
58 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
59 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
60 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
|
| H A D | kfd_mqd_manager_cik.c | 48 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask() local
54 q->cu_mask, q->cu_mask_count, se_mask); in update_cu_mask()
57 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
58 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
59 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
60 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
|
| H A D | kfd_mqd_manager.h | 121 uint32_t *se_mask);
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_mqd_manager_v11.c | 48 uint32_t se_mask[KFD_MAX_NUM_SE] = {0}; in update_cu_mask() local
74 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0); in update_cu_mask()
76 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
77 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
78 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
79 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
80 m->compute_static_thread_mgmt_se4 = se_mask[4]; in update_cu_mask()
81 m->compute_static_thread_mgmt_se5 = se_mask[5]; in update_cu_mask()
82 m->compute_static_thread_mgmt_se6 = se_mask[6]; in update_cu_mask()
83 m->compute_static_thread_mgmt_se7 = se_mask[ in update_cu_mask()
[all...] |
| H A D | kfd_mqd_manager_v9.c | 66 uint32_t se_mask[KFD_MAX_NUM_SE] = {0}; in update_cu_mask() local
72 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, inst); in update_cu_mask()
76 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
77 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
78 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
79 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
81 m->compute_static_thread_mgmt_se4 = se_mask[4]; in update_cu_mask()
82 m->compute_static_thread_mgmt_se5 = se_mask[5]; in update_cu_mask()
83 m->compute_static_thread_mgmt_se6 = se_mask[6]; in update_cu_mask()
84 m->compute_static_thread_mgmt_se7 = se_mask[ in update_cu_mask()
[all...] |
| H A D | kfd_mqd_manager_vi.c | 52 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask() local
58 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0); in update_cu_mask()
61 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
62 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
63 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
64 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
|
| H A D | kfd_mqd_manager_v10.c | 49 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask() local
55 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0); in update_cu_mask()
58 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
59 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
60 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
61 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
|
| H A D | kfd_mqd_manager_cik.c | 49 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask() local
55 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0); in update_cu_mask()
58 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
59 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
60 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
61 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
|
| H A D | kfd_mqd_manager.c | 100 uint32_t *se_mask, uint32_t inst) in mqd_symmetrically_map_cu_mask()
138 * 16 bits of se_mask) and will take care of the actual distribution of in mqd_symmetrically_map_cu_mask()
140 * Each half of se_mask must be filled only on bits 0-cu_per_sh[se][sh]-1. in mqd_symmetrically_map_cu_mask()
152 * se_mask programs up to 2 SH in the upper and lower 16 bits. in mqd_symmetrically_map_cu_mask()
156 * cu_mask[0] bit0 -> se_mask[0] bit0 in mqd_symmetrically_map_cu_mask()
157 * cu_mask[0] bit1 -> se_mask[1] bit0 in mqd_symmetrically_map_cu_mask()
159 * cu_mask[0] bit4 -> se_mask[0] bit1 in mqd_symmetrically_map_cu_mask()
163 * cu_mask[0] bit0 -> se_mask[0] bit0 (SE0,SH0,CU0) in mqd_symmetrically_map_cu_mask()
164 * cu_mask[0] bit1 -> se_mask[1] bit0 (SE1,SH0,CU0) in mqd_symmetrically_map_cu_mask()
166 * cu_mask[0] bit4 -> se_mask[ in mqd_symmetrically_map_cu_mask()
98 mqd_symmetrically_map_cu_mask(struct mqd_manager *mm, const uint32_t *cu_mask, uint32_t cu_mask_count, uint32_t *se_mask, uint32_t inst) mqd_symmetrically_map_cu_mask() argument
[all...] |
| H A D | kfd_mqd_manager.h | 141 uint32_t *se_mask, uint32_t inst);
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_stream_encoder.c | 42 enc110->se_shift->field_name, enc110->se_mask->field_name
330 if (enc110->se_mask->DP_VID_M_DOUBLE_VALUE_EN) in dce110_stream_encoder_dp_set_stream_attribute()
334 if (enc110->se_mask->DP_VID_N_MUL) in dce110_stream_encoder_dp_set_stream_attribute()
452 if (enc110->se_mask->DP_DYN_RANGE && enc110->se_mask->DP_YCBCR_RANGE) in dce110_stream_encoder_dp_set_stream_attribute()
576 if (!enc110->se_mask->HDMI_DATA_SCRAMBLE_EN) { in dce110_stream_encoder_hdmi_set_stream_attribute()
625 if (enc110->se_mask->HDMI_DATA_SCRAMBLE_EN) { in dce110_stream_encoder_hdmi_set_stream_attribute()
748 if (enc110->se_mask->HDMI_AVI_INFO_CONT && in dce110_stream_encoder_update_hdmi_info_packets()
749 enc110->se_mask->HDMI_AVI_INFO_SEND) { in dce110_stream_encoder_update_hdmi_info_packets()
783 if (enc110->se_mask in dce110_stream_encoder_update_hdmi_info_packets()
1654 dce110_stream_encoder_construct( struct dce110_stream_encoder *enc110, struct dc_context *ctx, struct dc_bios *bp, enum engine_id eng_id, const struct dce110_stream_enc_registers *regs, const struct dce_stream_encoder_shift *se_shift, const struct dce_stream_encoder_mask *se_mask) dce110_stream_encoder_construct() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_dio_stream_encoder.c | 44 enc1->se_shift->field_name, enc1->se_mask->field_name
483 const struct dcn10_stream_encoder_mask *se_mask) in dcn314_dio_stream_encoder_construct()
493 enc1->se_mask = se_mask; in dcn314_dio_stream_encoder_construct()
474 dcn314_dio_stream_encoder_construct( struct dcn10_stream_encoder *enc1, struct dc_context *ctx, struct dc_bios *bp, enum engine_id eng_id, struct vpg *vpg, struct afmt *afmt, const struct dcn10_stream_enc_registers *regs, const struct dcn10_stream_encoder_shift *se_shift, const struct dcn10_stream_encoder_mask *se_mask) dcn314_dio_stream_encoder_construct() argument
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_stream_encoder.c | 42 enc1->se_shift->field_name, enc1->se_mask->field_name
610 const struct dcn10_stream_encoder_mask *se_mask) in dcn20_stream_encoder_construct()
618 enc1->se_mask = se_mask; in dcn20_stream_encoder_construct()
603 dcn20_stream_encoder_construct( struct dcn10_stream_encoder *enc1, struct dc_context *ctx, struct dc_bios *bp, enum engine_id eng_id, const struct dcn10_stream_enc_registers *regs, const struct dcn10_stream_encoder_shift *se_shift, const struct dcn10_stream_encoder_mask *se_mask) dcn20_stream_encoder_construct() argument
|
| H A D | dcn20_stream_encoder.h | 95 const struct dcn10_stream_encoder_mask *se_mask);
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_dio_stream_encoder.c | 43 enc1->se_shift->field_name, enc1->se_mask->field_name
514 const struct dcn10_stream_encoder_mask *se_mask) in dcn32_dio_stream_encoder_construct()
524 enc1->se_mask = se_mask; in dcn32_dio_stream_encoder_construct()
505 dcn32_dio_stream_encoder_construct( struct dcn10_stream_encoder *enc1, struct dc_context *ctx, struct dc_bios *bp, enum engine_id eng_id, struct vpg *vpg, struct afmt *afmt, const struct dcn10_stream_enc_registers *regs, const struct dcn10_stream_encoder_shift *se_shift, const struct dcn10_stream_encoder_mask *se_mask) dcn32_dio_stream_encoder_construct() argument
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_stream_encoder.c | 43 enc1->se_shift->field_name, enc1->se_mask->field_name
650 const struct dcn10_stream_encoder_mask *se_mask) in dcn20_stream_encoder_construct()
658 enc1->se_mask = se_mask; in dcn20_stream_encoder_construct()
643 dcn20_stream_encoder_construct( struct dcn10_stream_encoder *enc1, struct dc_context *ctx, struct dc_bios *bp, enum engine_id eng_id, const struct dcn10_stream_enc_registers *regs, const struct dcn10_stream_encoder_shift *se_shift, const struct dcn10_stream_encoder_mask *se_mask) dcn20_stream_encoder_construct() argument
|
| H A D | dcn20_stream_encoder.h | 97 const struct dcn10_stream_encoder_mask *se_mask);
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dio_stream_encoder.c | 44 enc1->se_shift->field_name, enc1->se_mask->field_name
838 const struct dcn10_stream_encoder_mask *se_mask) in dcn30_dio_stream_encoder_construct()
848 enc1->se_mask = se_mask; in dcn30_dio_stream_encoder_construct()
829 dcn30_dio_stream_encoder_construct( struct dcn10_stream_encoder *enc1, struct dc_context *ctx, struct dc_bios *bp, enum engine_id eng_id, struct vpg *vpg, struct afmt *afmt, const struct dcn10_stream_enc_registers *regs, const struct dcn10_stream_encoder_shift *se_shift, const struct dcn10_stream_encoder_mask *se_mask) dcn30_dio_stream_encoder_construct() argument
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dio_stream_encoder.c | 44 enc1->se_shift->field_name, enc1->se_mask->field_name
889 const struct dcn10_stream_encoder_mask *se_mask) in dcn30_dio_stream_encoder_construct()
899 enc1->se_mask = se_mask; in dcn30_dio_stream_encoder_construct()
880 dcn30_dio_stream_encoder_construct( struct dcn10_stream_encoder *enc1, struct dc_context *ctx, struct dc_bios *bp, enum engine_id eng_id, struct vpg *vpg, struct afmt *afmt, const struct dcn10_stream_enc_registers *regs, const struct dcn10_stream_encoder_shift *se_shift, const struct dcn10_stream_encoder_mask *se_mask) dcn30_dio_stream_encoder_construct() argument
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_stream_encoder.c | 42 enc1->se_shift->field_name, enc1->se_mask->field_name
1659 const struct dcn10_stream_encoder_mask *se_mask) in dcn10_stream_encoder_construct()
1667 enc1->se_mask = se_mask; in dcn10_stream_encoder_construct()
1652 dcn10_stream_encoder_construct( struct dcn10_stream_encoder *enc1, struct dc_context *ctx, struct dc_bios *bp, enum engine_id eng_id, const struct dcn10_stream_enc_registers *regs, const struct dcn10_stream_encoder_shift *se_shift, const struct dcn10_stream_encoder_mask *se_mask) dcn10_stream_encoder_construct() argument
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_stream_encoder.c | 43 enc1->se_shift->field_name, enc1->se_mask->field_name
1617 const struct dcn10_stream_encoder_mask *se_mask) in dcn10_stream_encoder_construct()
1625 enc1->se_mask = se_mask; in dcn10_stream_encoder_construct()
1610 dcn10_stream_encoder_construct( struct dcn10_stream_encoder *enc1, struct dc_context *ctx, struct dc_bios *bp, enum engine_id eng_id, const struct dcn10_stream_enc_registers *regs, const struct dcn10_stream_encoder_shift *se_shift, const struct dcn10_stream_encoder_mask *se_mask) dcn10_stream_encoder_construct() argument
|