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Searched refs:sdhci_writel (Results 1 - 25 of 47) sorted by relevance

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/kernel/linux/linux-5.10/drivers/mmc/host/
H A Dsdhci-pci-dwc-mshc.c41 sdhci_writel(host, reg, (SDHC_AT_CTRL_R + vendor_ptr)); in sdhci_snps_set_clock()
49 sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock()
53 sdhci_writel(host, DIV_REG_100_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock()
54 sdhci_writel(host, CLKFBOUT_100_MHZ, in sdhci_snps_set_clock()
57 sdhci_writel(host, DIV_REG_200_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock()
58 sdhci_writel(host, CLKFBOUT_200_MHZ, in sdhci_snps_set_clock()
65 sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock()
H A Dsdhci-milbeaut.c67 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch()
69 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch()
72 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch()
77 sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING); in sdhci_milbeaut_soft_voltage_switch()
120 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); in sdhci_milbeaut_reset()
138 sdhci_writel(host, 0, MLB_SOFT_RESET); in sdhci_milbeaut_bridge_reset()
140 sdhci_writel(host, MLB_SOFT_RESET_RSTX, MLB_SOFT_RESET); in sdhci_milbeaut_bridge_reset()
169 sdhci_writel(host, val, MLB_CR_SET); in sdhci_milbeaut_bridge_init()
171 sdhci_writel(host, MLB_CDR_SET_CLK2POW16, MLB_CDR_SET); in sdhci_milbeaut_bridge_init()
173 sdhci_writel(hos in sdhci_milbeaut_bridge_init()
[all...]
H A Dsdhci-of-esdhc.c520 sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); in esdhc_of_adma_workaround()
543 sdhci_writel(host, value, ESDHC_DMA_SYSCTL); in esdhc_of_enable_dma()
595 sdhci_writel(host, val, ESDHC_SYSTEM_CONTROL); in esdhc_clock_enable()
623 sdhci_writel(host, val, ESDHC_DMA_SYSCTL); in esdhc_flush_async_fifo()
716 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_of_set_clock()
740 sdhci_writel(host, temp | ESDHC_HS400_MODE, ESDHC_TBCTL); in esdhc_of_set_clock()
742 sdhci_writel(host, temp | ESDHC_CMD_CLK_CTL, ESDHC_SDCLKCTL); in esdhc_of_set_clock()
749 sdhci_writel(host, temp, ESDHC_DLLCFG0); in esdhc_of_set_clock()
752 sdhci_writel(host, temp, ESDHC_DLLCFG0); in esdhc_of_set_clock()
755 sdhci_writel(hos in esdhc_of_set_clock()
[all...]
H A Dsdhci_f_sdh30.c44 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
46 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
49 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
56 sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_soft_voltage_switch()
61 sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING); in sdhci_f_sdh30_soft_voltage_switch()
82 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_reset()
160 sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_probe()
162 sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_probe()
H A Dsdhci-xenon-phy.c237 sdhci_writel(host, reg, phy_regs->timing_adj); in xenon_emmc_phy_init()
353 sdhci_writel(host, reg, phy_regs->dll_ctrl); in xenon_emmc_phy_enable_dll()
408 sdhci_writel(host, reg, XENON_SLOT_OP_STATUS_CTRL); in xenon_emmc_phy_config_tuning()
422 sdhci_writel(host, reg, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_disable_strobe()
428 sdhci_writel(host, reg, XENON_EMMC_5_0_PHY_PAD_CONTROL); in xenon_emmc_phy_disable_strobe()
432 sdhci_writel(host, reg, XENON_EMMC_PHY_PAD_CONTROL1); in xenon_emmc_phy_disable_strobe()
465 sdhci_writel(host, reg, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_strobe_delay_adj()
472 sdhci_writel(host, reg, XENON_EMMC_5_0_PHY_PAD_CONTROL); in xenon_emmc_phy_strobe_delay_adj()
477 sdhci_writel(host, reg, XENON_EMMC_PHY_PAD_CONTROL1); in xenon_emmc_phy_strobe_delay_adj()
536 sdhci_writel(hos in xenon_emmc_phy_slow_mode()
[all...]
H A Dsdhci-xenon.c31 sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
65 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_set_sdclk_off_idle()
78 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_set_acg()
89 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_enable_sdhc()
107 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_disable_sdhc()
118 sdhci_writel(host, reg, XENON_SYS_EXT_OP_CTRL); in xenon_enable_sdhc_parallel_tran()
128 sdhci_writel(host, reg, XENON_SYS_EXT_OP_CTRL); in xenon_mask_cmd_conflict_err()
140 sdhci_writel(host, reg, XENON_SLOT_RETUNING_REQ_CTRL); in xenon_retune_setup()
145 sdhci_writel(host, reg, SDHCI_SIGNAL_ENABLE); in xenon_retune_setup()
148 sdhci_writel(hos in xenon_retune_setup()
[all...]
H A Dsdhci-bcm-kona.c69 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset()
89 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset()
101 sdhci_writel(host, val, KONA_SDHOST_COREIMR); in sdhci_bcm_kona_sd_init()
114 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_init()
149 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); in sdhci_bcm_kona_sd_card_emulate()
152 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); in sdhci_bcm_kona_sd_card_emulate()
H A Dsdhci-pci-gli.c127 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_on()
144 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_off()
174 sdhci_writel(host, driving_value, SDHCI_GLI_9750_DRIVING); in gli_set_9750()
179 sdhci_writel(host, sw_ctrl_value, SDHCI_GLI_9750_SW_CTRL); in gli_set_9750()
210 sdhci_writel(host, pll_value, SDHCI_GLI_9750_PLL); in gli_set_9750()
211 sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC); in gli_set_9750()
222 sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750()
225 sdhci_writel(host, parameter_value, SDHCI_GLI_9750_TUNING_PARAMETERS); in gli_set_9750()
231 sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750()
256 sdhci_writel(hos in gli_set_9750_rx_inv()
[all...]
H A Dsdhci-sprd.c111 sdhci_writel(host, val, SDHCI_SPRD_REG_DEBOUNCE); in sdhci_sprd_init_config()
188 sdhci_writel(host, dll_dly_offset, SDHCI_SPRD_REG_32_DLL_DLY_OFFSET); in sdhci_sprd_set_dll_invert()
233 sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI); in _sdhci_sprd_set_clock()
238 sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI); in _sdhci_sprd_set_clock()
249 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll()
256 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll()
262 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll()
354 sdhci_writel(host, p[timing], SDHCI_SPRD_REG_32_DLL_DLY); in sdhci_sprd_set_uhs_signaling()
544 sdhci_writel(host, p[MMC_TIMING_MMC_HS400 + 1], in sdhci_sprd_hs400_enhanced_strobe()
H A Dsdhci-tegra.c348 sdhci_writel(host, reg, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_set_tap()
400 sdhci_writel(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL); in tegra_sdhci_reset()
401 sdhci_writel(host, clk_ctrl, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_reset()
407 sdhci_writel(host, pad_ctrl, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); in tegra_sdhci_reset()
430 sdhci_writel(host, val, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); in tegra_sdhci_configure_cal_pad()
444 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_set_pad_autocal_offset()
490 sdhci_writel(host, reg, in tegra_sdhci_set_padctrl()
552 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib()
570 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib()
801 sdhci_writel(hos in tegra_sdhci_hs400_enhanced_strobe()
[all...]
H A Dsdhci.c173 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_card_detection()
174 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_card_detection()
270 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_default_irqs()
271 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_default_irqs()
570 sdhci_writel(host, scratch, SDHCI_BUFFER); in sdhci_write_block_pio()
857 sdhci_writel(host, lower_32_bits(addr), SDHCI_ADMA_ADDRESS); in sdhci_set_adma_addr()
859 sdhci_writel(host, upper_32_bits(addr), SDHCI_ADMA_ADDRESS_HI); in sdhci_set_adma_addr()
875 sdhci_writel(host, addr, SDHCI_DMA_ADDRESS); in sdhci_set_sdma_addr()
1016 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_transfer_irqs()
1017 sdhci_writel(hos in sdhci_set_transfer_irqs()
[all...]
H A Dsdhci-pci-o2micro.c108 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
111 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
115 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
142 sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_enable_internal_clock()
255 sdhci_writel(host, scratch_32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_dll_recovery()
625 sdhci_writel(host, reg, O2_SD_VENDOR_SETTING2); in sdhci_pci_o2_probe_slot()
/kernel/linux/linux-6.6/drivers/mmc/host/
H A Dsdhci-pci-dwc-mshc.c41 sdhci_writel(host, reg, (SDHC_AT_CTRL_R + vendor_ptr)); in sdhci_snps_set_clock()
49 sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock()
53 sdhci_writel(host, DIV_REG_100_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock()
54 sdhci_writel(host, CLKFBOUT_100_MHZ, in sdhci_snps_set_clock()
57 sdhci_writel(host, DIV_REG_200_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock()
58 sdhci_writel(host, CLKFBOUT_200_MHZ, in sdhci_snps_set_clock()
65 sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock()
H A Dsdhci-milbeaut.c67 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch()
69 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch()
72 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_milbeaut_soft_voltage_switch()
77 sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING); in sdhci_milbeaut_soft_voltage_switch()
120 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); in sdhci_milbeaut_reset()
138 sdhci_writel(host, 0, MLB_SOFT_RESET); in sdhci_milbeaut_bridge_reset()
140 sdhci_writel(host, MLB_SOFT_RESET_RSTX, MLB_SOFT_RESET); in sdhci_milbeaut_bridge_reset()
169 sdhci_writel(host, val, MLB_CR_SET); in sdhci_milbeaut_bridge_init()
171 sdhci_writel(host, MLB_CDR_SET_CLK2POW16, MLB_CDR_SET); in sdhci_milbeaut_bridge_init()
173 sdhci_writel(hos in sdhci_milbeaut_bridge_init()
[all...]
H A Dsdhci_f_sdh30.c47 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
49 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
52 sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
59 sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_soft_voltage_switch()
64 sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING); in sdhci_f_sdh30_soft_voltage_switch()
85 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_reset()
92 sdhci_writel(host, ctl, F_SDH30_TEST); in sdhci_f_sdh30_reset()
180 sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_probe()
182 sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_probe()
H A Dsdhci-of-esdhc.c527 sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); in esdhc_of_adma_workaround()
550 sdhci_writel(host, value, ESDHC_DMA_SYSCTL); in esdhc_of_enable_dma()
602 sdhci_writel(host, val, ESDHC_SYSTEM_CONTROL); in esdhc_clock_enable()
630 sdhci_writel(host, val, ESDHC_DMA_SYSCTL); in esdhc_flush_async_fifo()
723 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_of_set_clock()
747 sdhci_writel(host, temp | ESDHC_HS400_MODE, ESDHC_TBCTL); in esdhc_of_set_clock()
749 sdhci_writel(host, temp | ESDHC_CMD_CLK_CTL, ESDHC_SDCLKCTL); in esdhc_of_set_clock()
756 sdhci_writel(host, temp, ESDHC_DLLCFG0); in esdhc_of_set_clock()
759 sdhci_writel(host, temp, ESDHC_DLLCFG0); in esdhc_of_set_clock()
762 sdhci_writel(hos in esdhc_of_set_clock()
[all...]
H A Dsdhci-of-dwcmshc.c210 sdhci_writel(host, vendor, reg); in dwcmshc_hs400_enhanced_strobe()
244 sdhci_writel(host, extra, reg); in dwcmshc_rk3568_set_clock()
251 sdhci_writel(host, DWCMSHC_EMMC_DLL_BYPASS | DWCMSHC_EMMC_DLL_START, DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock()
252 sdhci_writel(host, DLL_RXCLK_ORI_GATE, DWCMSHC_EMMC_DLL_RXCLK); in dwcmshc_rk3568_set_clock()
253 sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK); in dwcmshc_rk3568_set_clock()
254 sdhci_writel(host, 0, DECMSHC_EMMC_DLL_CMDOUT); in dwcmshc_rk3568_set_clock()
263 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN); in dwcmshc_rk3568_set_clock()
268 sdhci_writel(host, BIT(1), DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock()
270 sdhci_writel(host, 0x0, DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock()
279 sdhci_writel(hos in dwcmshc_rk3568_set_clock()
[all...]
H A Dsdhci-xenon-phy.c258 sdhci_writel(host, reg, phy_regs->timing_adj); in xenon_emmc_phy_init()
383 sdhci_writel(host, reg, phy_regs->dll_ctrl); in xenon_emmc_phy_enable_dll()
438 sdhci_writel(host, reg, XENON_SLOT_OP_STATUS_CTRL); in xenon_emmc_phy_config_tuning()
452 sdhci_writel(host, reg, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_disable_strobe()
458 sdhci_writel(host, reg, XENON_EMMC_5_0_PHY_PAD_CONTROL); in xenon_emmc_phy_disable_strobe()
462 sdhci_writel(host, reg, XENON_EMMC_PHY_PAD_CONTROL1); in xenon_emmc_phy_disable_strobe()
495 sdhci_writel(host, reg, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_strobe_delay_adj()
502 sdhci_writel(host, reg, XENON_EMMC_5_0_PHY_PAD_CONTROL); in xenon_emmc_phy_strobe_delay_adj()
507 sdhci_writel(host, reg, XENON_EMMC_PHY_PAD_CONTROL1); in xenon_emmc_phy_strobe_delay_adj()
566 sdhci_writel(hos in xenon_emmc_phy_slow_mode()
[all...]
H A Dsdhci-bcm-kona.c58 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset()
78 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset()
90 sdhci_writel(host, val, KONA_SDHOST_COREIMR); in sdhci_bcm_kona_sd_init()
103 sdhci_writel(host, val, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_init()
138 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); in sdhci_bcm_kona_sd_card_emulate()
141 sdhci_writel(host, val, KONA_SDHOST_CORESTAT); in sdhci_bcm_kona_sd_card_emulate()
H A Dsdhci-xenon.c32 sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
66 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_set_sdclk_off_idle()
79 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_set_acg()
90 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_enable_sdhc()
108 sdhci_writel(host, reg, XENON_SYS_OP_CTRL); in xenon_disable_sdhc()
119 sdhci_writel(host, reg, XENON_SYS_EXT_OP_CTRL); in xenon_enable_sdhc_parallel_tran()
129 sdhci_writel(host, reg, XENON_SYS_EXT_OP_CTRL); in xenon_mask_cmd_conflict_err()
141 sdhci_writel(host, reg, XENON_SLOT_RETUNING_REQ_CTRL); in xenon_retune_setup()
146 sdhci_writel(host, reg, SDHCI_SIGNAL_ENABLE); in xenon_retune_setup()
149 sdhci_writel(hos in xenon_retune_setup()
[all...]
H A Dsdhci-sprd.c126 sdhci_writel(host, val, SDHCI_SPRD_REG_DEBOUNCE); in sdhci_sprd_init_config()
203 sdhci_writel(host, dll_dly_offset, SDHCI_SPRD_REG_32_DLL_DLY_OFFSET); in sdhci_sprd_set_dll_invert()
248 sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI); in _sdhci_sprd_set_clock()
253 sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI); in _sdhci_sprd_set_clock()
264 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll()
271 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll()
277 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG); in sdhci_sprd_enable_phy_dll()
378 sdhci_writel(host, p[timing], SDHCI_SPRD_REG_32_DLL_DLY); in sdhci_sprd_set_uhs_signaling()
568 sdhci_writel(host, p[MMC_TIMING_MMC_HS400 + 1], in sdhci_sprd_hs400_enhanced_strobe()
648 sdhci_writel(hos in sdhci_sprd_tuning()
[all...]
H A Dsdhci-of-arasan.c460 sdhci_writel(host, vendor, SDHCI_ARASAN_VENDOR_REGISTER); in sdhci_arasan_hs400_enhanced_strobe()
904 sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER); in sdhci_versal_sdcardclk_set_phase()
907 sdhci_writel(host, regval, SDHCI_ARASAN_OTAPDLY_REGISTER); in sdhci_versal_sdcardclk_set_phase()
971 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase()
973 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase()
976 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase()
978 sdhci_writel(host, regval, SDHCI_ARASAN_ITAPDLY_REGISTER); in sdhci_versal_sampleclk_set_phase()
1020 sdhci_writel(host, regval, PHY_CTRL_REG1); in sdhci_versal_net_emmc_sdcardclk_set_phase()
1023 sdhci_writel(host, regval, PHY_CTRL_REG1); in sdhci_versal_net_emmc_sdcardclk_set_phase()
1054 sdhci_writel(hos in sdhci_versal_net_emmc_sampleclk_set_phase()
[all...]
H A Dsdhci-pci-gli.c244 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_on()
261 sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT); in gl9750_wt_off()
291 sdhci_writel(host, driving_value, SDHCI_GLI_9750_DRIVING); in gli_set_9750()
296 sdhci_writel(host, sw_ctrl_value, SDHCI_GLI_9750_SW_CTRL); in gli_set_9750()
327 sdhci_writel(host, pll_value, SDHCI_GLI_9750_PLL); in gli_set_9750()
328 sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC); in gli_set_9750()
339 sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750()
342 sdhci_writel(host, parameter_value, SDHCI_GLI_9750_TUNING_PARAMETERS); in gli_set_9750()
348 sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL); in gli_set_9750()
373 sdhci_writel(hos in gli_set_9750_rx_inv()
[all...]
H A Dsdhci-tegra.c355 sdhci_writel(host, reg, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_set_tap()
407 sdhci_writel(host, misc_ctrl, SDHCI_TEGRA_VENDOR_MISC_CTRL); in tegra_sdhci_reset()
408 sdhci_writel(host, clk_ctrl, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_reset()
414 sdhci_writel(host, pad_ctrl, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); in tegra_sdhci_reset()
437 sdhci_writel(host, val, SDHCI_TEGRA_SDMEM_COMP_PADCTRL); in tegra_sdhci_configure_cal_pad()
451 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_set_pad_autocal_offset()
497 sdhci_writel(host, reg, in tegra_sdhci_set_padctrl()
559 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib()
577 sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib()
815 sdhci_writel(hos in tegra_sdhci_hs400_enhanced_strobe()
[all...]
H A Dsdhci.c172 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_card_detection()
173 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_card_detection()
309 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_default_irqs()
310 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_default_irqs()
601 sdhci_writel(host, scratch, SDHCI_BUFFER); in sdhci_write_block_pio()
882 sdhci_writel(host, lower_32_bits(addr), SDHCI_ADMA_ADDRESS); in sdhci_set_adma_addr()
884 sdhci_writel(host, upper_32_bits(addr), SDHCI_ADMA_ADDRESS_HI); in sdhci_set_adma_addr()
900 sdhci_writel(host, addr, SDHCI_DMA_ADDRESS); in sdhci_set_sdma_addr()
1038 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_transfer_irqs()
1039 sdhci_writel(hos in sdhci_set_transfer_irqs()
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